ISL6559CR-T Intersil, ISL6559CR-T Datasheet

IC CTRLR PWM MULTIPHASE 32-QFN

ISL6559CR-T

Manufacturer Part Number
ISL6559CR-T
Description
IC CTRLR PWM MULTIPHASE 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6559CR-T

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
4MHz
Duty Cycle
75%
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Frequency-max
4MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6559CR-T
Manufacturer:
INTERSIL
Quantity:
5 400
Multi-Phase PWM Controller
The ISL6559 provides core-voltage regulation by driving 2 to
4 interleaved synchronous-rectified buck-converter channels
in parallel. Interleaving the channel timing results in
increased ripple frequency which reduces input and output
ripple currents. The reduction in ripple results in lower
component cost, reduced dissipation, and a smaller
implementation area.
The ISL6559 uses cost and space-saving r
for channel current balance, active voltage positioning, and
over-current protection. Output voltage is monitored by an
internal differential remote sense amplifier. A high-bandwidth
error amplifier drives the output voltage to match the
programmed 5-bit DAC reference voltage. The resulting
compensation signal guides the creation of pulse width
modulated (PWM) signals to control companion Intersil
MOSFET drivers. The OFS pin allows direct offset of the
DAC voltage from 0V to 50mV using a single external
resistor. The entire system is trimmed to ensure a system
accuracy of ±
Outstanding features of this controller IC include
Dynamic VID
changing without the need of any external components.
Output voltage “droop” or active voltage positioning is
optional. When employed, it allows the reduction in size and
cost of the output capacitors required to support load
transients. A threshold-sensitive enable input allows the use
of an external resistor divider for start-up coordination with
Intersil MOSFET drivers or any other devices powered from
a separate supply.
Superior over-voltage protection is achieved by gating on the
lower MOSFET of all phases to crowbar the output voltage.
An optional second crowbar on V
MOSFET or SCR gated by the OVP pin, is triggered when
an over-voltage condition is detected. Under-voltage
conditions are detected, but PWM operation is not disrupted.
Over-current conditions cause a hiccup-mode response as
the controller repeatedly tries to restart. After a set number
of failed startup attempts, the controller latches off. A power
good logic signal indicates when the converter output is
between the UV and OV thresholds.
TM
1
% over temperature.
technology allowing seamless on-the-fly VID
®
1
IN
, formed with an external
Data Sheet
Dynamic VID is a trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners.
DS(ON)
sensing
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
COMP
VDIFF
RGND
VSEN
IOUT
ISL6559CB (28 LEAD SOIC)
GND
VID4
VID3
VID2
VID1
VID0
OVP
OFS
FB
Features
• Multi-Phase Power Conversion
• Active Channel Current Balancing
• Precision r
• Input Voltage: 12V or 5V Bias
• Precision CORE Voltage Regulation
• Microprocessor Voltage Identification Input
• Programmable Droop Voltage
• Fast Transient Recovery Time
• Over Current Protection
• Digital Soft Start
• Threshold Sensitive Enable Input
• High Ripple Frequency (160kHz to 4MHz)
• QFN Package:
• Pb-Free Available (RoHS Compliant)
Applications
• AMD Hammer Family Processor Voltage Regulator
• Low Output Voltage, High Current DC-DC Converters
• Voltage Regulator Modules
Pinouts
10
11
12
13
14
December 29, 2004
- 2, 3 or 4 Phase Operation
- Lossless
- Low Cost
- ±
- Differential Remote Output Voltage Sensing
- Programmable Reference Offset
- 5-Bit VID Input
- 0.800V to 1.550V in 25mV Steps
- Dynamic VID Technology
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
- Near Chip Scale Package footprint, which improves PCB
1
2
3
4
5
6
7
8
9
No Leads - Package Outline
efficiency and has a thinner profile
1
TOP VIEW
% System Accuracy Over Temperature
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
DS(ON)
Copyright © Intersil Americas Inc. 2002-2004. All Rights Reserved.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
EN
FS/DIS
PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
GND
ISEN2
ISEN3
PWM3
VCC
GND
Current Sharing
COMP
VID2
VID1
VID0
OFS
NC
NC
FB
ISL6559CR (32 LEAD QFN)
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
NC = NO CONNECT
TOP VIEW
ISL6559
FN9084.8
24
23
22
21
20
19
18
17
PWM4
ISEN4
ISEN1
PWM1
PWM2
GND
ISEN2
ISEN3

Related parts for ISL6559CR-T

ISL6559CR-T Summary of contents

Page 1

... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 Dynamic VID is a trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. ISL6559 FN9084.8 Current Sharing DS(ON) ISL6559CR (32 LEAD QFN) TOP VIEW FS/DIS 26 ...

Page 2

... ISL6559 Ordering Information PKG. DWG. # PART # M28.3 ISL6559CR-T M28.3 ISL6559CRZ- 5x5 QFN Tape and Reel (Pb-free) NOTE: * Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 3

Typical Application - 3 Phase Converter 300Ω ISL6559 VSEN VCC RGND PWM4 VDIFF ISEN4 PWM1 C C IOUT ISEN1 R C COMP PWM2 OFS ISEN2 R OFS FS/DIS PWM3 R T ISEN3 VID4 VID3 VID2 VID1 VID0 ...

Page 4

Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V ...

Page 5

... POWER GOOD AND PROTECTION MONITORS PGOOD Low Voltage Under-Voltage Offset From VID Over-Voltage Threshold OVP Voltage NOTE: 3. These parts are designed and adjusted for accuracy within the system tolerance Functional Pin Description ISL6559CB (28 LEAD SOIC) ISL6559CR (32 LEAD QFN) TOP VIEW 28 EN GND 1 OVP 2 27 ...

Page 6

... Pull this pin below 1.14V, taking into account the enable hysteresis, to disable the controller once in operation. Connect a resistor divider to this pin to set the power-on voltage level for proper coordination with Intersil 6 ISL6559 MOSFET drivers. If this function is not required, simply tie ...

Page 7

To understand the reduction of ripple current amplitude in the multi-phase circuit, examine the equation representing an individual channel’s peak-to-peak inductor current – OUT OUT I = ----------------------------------------------------- - ...

Page 8

... The output of the error amplifier sawtooth waveform to modulate the pulse width of the PWM Σ 3 signals. The PWM signals control the timing of the Intersil I 2 MOSFET drivers and regulate the converter output to the specified reference voltage. Three distinct inputs to the error amplifier determine the voltage level of V and external circuitry which control voltage regulation is illustrated in Figure 5 ...

Page 9

... DAC) plus offset errors in the OFS current source, remote- sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6559 to include all variations in current TABLE 1. VOLTAGE IDENTIFICATION CODES VID3 ...

Page 10

LOAD-LINE REGULATION Microprocessor load current demands change from near no- load to full load often during operation. The ...

Page 11

... It is important that the driver ICs reach their POR level before the ISL6559 becomes enabled. The schematic in Figure 7 demonstrates sequencing the ISL6559 with the HIP660X family of Intersil MOSFET drivers which require 12V bias. Third, the frequency select\disable input (FS/DIS) will shutdown the converter when pulled to ground ...

Page 12

-------------------------------------------------- - = 560µ DELAY 1.4 VID 1 + ---------------------------------------- - – × 160 10 FB Following the delay, the soft start ramps linearly until V reaches VID. For the system described ...

Page 13

... ISL6559 to protect the microprocessor load. First, all PWM outputs are commanded low. Directing the Intersil drivers to turn on the lower MOSFETs; shunting the output to ground preventing any further increase in output voltage. The PWM outputs remain low until VDIFF falls to the programmed DAC level at which time they go into a high- impedance state ...

Page 14

Power Stages The first step in designing a multi-phase converter is to determine the number of phases. This determination depends heavily on the cost analysis which in turn depends on system constraints that differ from one design to the next. ...

Page 15

Select the values for these resistors based on the room temperature r of the lower MOSFETs; the full-load DS(ON) operating current and the number of phases according to Equation 19 (see also Figure 3). r ...

Page 16

Case 1: 0 2π LC 2π ----------------------------------- - C FB 0.75V IN ...

Page 17

In Equations 24 the per-channel filter inductance divided by the number of active channels the sum total of all output capacitors; ESR is the equivalent-series resistance of the bulk output-filter capacitance; and V the peak-to-peak sawtooth ...

Page 18

Application on page 3). Figure 15 and Equation 29 are provided to assist in the selecting the correct value for R 1000 100 10 10 100 SWITCHING FREQUENCY (kHz) FIGURE 14 SWITCHING FREQUENCY ...

Page 19

... Align the output inductors and MOSFETs such that space between the components is minimized while creating the PHASE plane. Place the Intersil HIP660X drivers as close as possible to the MOSFETs they control to reduce the parasitics due to trace length between critical driver input and output signals ...

Page 20

Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...

Page 21

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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