LTC3714EG#TRPBF Linear Technology, LTC3714EG#TRPBF Datasheet - Page 12

IC STP-DWN CNTRLR W/OPAMP 28SSOP

LTC3714EG#TRPBF

Manufacturer Part Number
LTC3714EG#TRPBF
Description
IC STP-DWN CNTRLR W/OPAMP 28SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3714EG#TRPBF

Applications
Controller, Intel Pentium®
Voltage - Input
4 ~ 36 V
Number Of Outputs
1
Voltage - Output
0.6 ~ 1.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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applicaTions inForMaTion
LTC3417A
is given to ripple current ratings and long term reliability.
Ceramic capacitors have the lowest ESR and cost but also
have the lowest capacitance density, high voltage and
temperature coefficient and exhibit audible piezoelectric
effects. In addition, the high Q of ceramic capacitors along
with trace inductance can lead to significant ringing. Other
capacitor types include the Panasonic specialty polymer
(SP) capacitors.
In most cases, 0.1µF to 1µF of ceramic capacitors should
also be placed close to the LTC3417A in parallel with the
main capacitors for high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Because the
LTC3417 control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size. When choosing the input and output
ceramic capacitors, choose the X5R or X7R dielectric
formulations. These dielectrics have the best temperature
and voltage characteristics of all the ceramics for a given
value and size.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must fulfill a charge storage re-
quirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation com-
ponents and the output capacitor size. Typically, 3 to 4
cycles are required to respond to a load step, but only in
12
IN
pin. At best, this ringing can
the first cycle does the output drop linearly. The output
droop, V
droop of the first cycle. Thus, a good place to start is with
the output capacitor size of approximately:
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance
to the supply is very low. A 10µF ceramic capacitor is
usually enough for these conditions.
Setting the Output Voltage
The LTC3417A develops a 0.8V reference voltage between
the feedback pins, V
as shown in Figure 4. The output voltages are set by two
resistive dividers according to the following formulas:
Keeping the current small (<5µA) in these resistors
maximizes efficiency, but making the current too small
may allow stray capacitance to cause noise problems and
reduce the phase margin of the error amp loop.
To improve the frequency response, a feed-forward ca-
pacitor, C
to route the V
the inductor or the SW line.
Soft-Start
Soft-start reduces surge currents from V
ally increasing the peak inductor current. Power supply
sequencing can also be accomplished by controlling the
I
for each regulator output, which steps up a clamp on
TH
C
V
V
pin. The LTC3417A has an internal digital soft-start
OUT1
OUT2
OUT
DROOP
≈ 2.5
F
≈ 0.8V 1+
≈ 0.8V 1+
, may also be used. Great care should be taken
FB
, is usually about 2 to 3 times the linear
f
O
node away from noise sources, such as
• V
∆I
FB1
OUT
DROOP
R2
R1
R3
R4
and V
FB2
, and the signal ground
IN
by gradu-
3417afc

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