L6731DTR STMicroelectronics, L6731DTR Datasheet

IC CTRLR ADJ STPDN SYNC 16-TSSOP

L6731DTR

Manufacturer Part Number
L6731DTR
Description
IC CTRLR ADJ STPDN SYNC 16-TSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6731DTR

Applications
Controller, DDR
Voltage - Input
1.8 ~ 14 V
Number Of Outputs
1
Voltage - Output
Adjustable down to 0.6V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Output Voltage
0.6 V to 18 V
Input Voltage
1.8 V to 14 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6112-2

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Quantity
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Part Number:
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Quantity:
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L6731DTR
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Features
Table 1.
June 2008
Input voltage range from 1.8 V to 14 V
Supply voltage range from 4.5 V to 14 V
Adjustable output voltage down to 0.6 V with
±0.8 % Accuracy over line voltage and
temperature (0 °C~125 °C)
Fixed frequency voltage mode control
T
0 % to 100 % duty cycle
V
Regulates V
Soft-start and inhibit
High current embedded drivers
Predictive anti-cross conduction control
Programmable high-side and low-side R
sense over-current-protection
Selectable switching frequency 250 kHz /
500 kHz
Power good output
Sink/source capability for DDR memory and
termination supply
Over-voltage protection
Thermal shutdown
Package: HTSSOP16
ON
DDR
lower than 100 ns
Adjustable step-down controller with synchronous rectification
input sense
Order codes
L6731DTR
Device summary
L6731D
TT
and V
TTREF
within 1 % of V
DS(on)
DDQ
HTSSOP16
HTSSOP16
Package
Rev 3
Applications
High performance / high density DC-DC
modules
Low voltage distributed DC-DC
niPoL converters
DDR memory supply
DDR termination supply
Graphic cards
dedicated to DDR memory
HTSSOP16 (exposed pad)
Tape and reel
Packaging
Tube
L6731D
www.st.com
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L6731DTR Summary of contents

Page 1

... Sink/source capability for DDR memory and termination supply ■ Over-voltage protection ■ Thermal shutdown ■ Package: HTSSOP16 Table 1. Device summary Order codes L6731D L6731DTR June 2008 within DDQ Applications ■ High performance / high density DC-DC modules DS(on) ■ Low voltage distributed DC-DC ■ ...

Page 2

Contents Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

L6731D 1 Summary description The controller is an integrated circuit realized in BCD5 (BiCMOS-DMOS, version 5) fabrication that provides complete control logic and protection for high performance step-down DC-DC and niPoL converters designed to drive N-channel MOSFETs in ...

Page 4

Summary description 1.1 Functional description Figure 1. Block diagram 4/23 V =4.5V to14V CC OCL OCH VCC LDO Monitor SS/INH Protection and Ref OSC DDR-IN L6731D 0. PWM PGOOD + - + - VTTREF ...

Page 5

L6731D 2 Electrical data 2.1 Maximum rating Table 2. Absolute maximum ratings Symbol BOOT - Boot voltage V PHASE V HGATE - V PHASE V BOOT BOOT PHASE V PHASE PHASE spike, transient < 50 ...

Page 6

Pin connections and functions 3 Pin connections and functions Figure 2. Pin connection (top view) Table 4. Pin functions Pin n. Name 1 PGOOD 2 V TTREF 3 SGND COMP 6 SS/INH 7 DDR-IN 6/23 PGOOD 16 ...

Page 7

L6731D Table 4. Pin functions (continued) Pin n. Name 8 OCL 9 OCH 10 PHASE 11 HGATE 12 BOOT 13 PGND 14 LGATE 15 V CCDR Function A resistor connected from this pin to ground sets the ...

Page 8

Electrical characteristics 4 Electrical characteristics °C unless otherwise specified Table 5. Electrical characteristics Symbol Parameter V supply current CC V stand by current quiescent current CC Power-ON ...

Page 9

L6731D Table 5. Electrical characteristics (continued) Symbol Parameter Gate drivers R High side source resistance HGATE_ON R High side sink resistance HGATE_OFF R Low side source resistance LGATE_ON R Low side sink resistance LGATE_OFF Protections I OCH current source OCH ...

Page 10

Device description 5 Device description 5.1 Oscillator The switching frequency can be fixed to two values: 250 kHz or 500 kHz by setting the proper voltage at the EAREF pin (see external reference). 5.2 Internal LDO An internal LDO supplies ...

Page 11

L6731D 5.3 Bypassing the LDO to avoid the voltage drop with low Vcc ≈ the internal LDO works in dropout with an output resistance of about 1 Ω. The maximum LDO output current is about ...

Page 12

Device description 5.5 Error amplifier Figure 5. Error amplifier reference V CCDR DDR-IN 5.6 Soft-start When both V and V CC pin) the start-up phase takes place. Otherwise the SS pin is internally shorted to GND. At start-up, a ramp ...

Page 13

L6731D The reference of the error amplifier is clamped with this voltage (Vss) until it reaches the programmed value. The L6731D can always sink or source current over current is detected during the soft-start phase, the device provides ...

Page 14

Device description low-side will turn-on before the output voltage exceeds the over-voltage threshold, because the error amplifier will throw off balance in advance. Even if the device doesn't report an over-voltage, the behavior is the same, because the low-side is ...

Page 15

L6731D Equation 1 During soft-start the OC acts in constant current mode: a current control loop limits the value of the error amplifier output (comp), in order to avoid its saturation and thus recover faster when the output returns in ...

Page 16

Device description during the off-time the valley-current-protection can operate in every case. The first advantage related to this feature is the possibility to realize extremely low conversion ratios. Figure 10. shows a conversion from 0 ...

Page 17

L6731D 6 Application details 6.1 Inductor design The inductance value is defined by a compromise between the transient response time, the efficiency, the cost and the size. The inductor has to be calculated to sustain the output and the input ...

Page 18

Application details For a given inductor value, minimum input voltage, output voltage and maximum load transient, a maximum ESR and a minimum Cout value can be set. The ESR and Cout values also affect the static output voltage ripple. In ...

Page 19

L6731D Figure 11. Compensation network The compensation network consists in the internal error amplifier, the impedance networks Z (R3, R4 and C20) and Z IN provide a closed loop transfer function with the highest 0 dB crossing frequency to have ...

Page 20

Application details Equation 12 Equation 13 Equation 14 ● Compensation network design: – Equation 15 – – – – – Figure 12. Asymptotic bode plot of converter's open loop gain 20/23 1 ω ⋅ ...

Page 21

L6731D 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the ...

Page 22

Revision history 8 Revision history Table 7. Document revision history Date 21-Dec-2005 31-May-2006 04-Jun-2008 22/23 Revision 1 Initial release. 2 New template, thermal data updated Updated: Table 4 on page 3 11, Figure 13 on page 21 Changes 6, Table ...

Page 23

... L6731D Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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