L6731D STMicroelectronics, L6731D Datasheet
L6731D
Specifications of L6731D
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L6731D Summary of contents
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... High performance / high density DC-DC modules DS(on) ■ Low voltage distributed DC-DC ■ niPoL converters ■ DDR memory supply ■ DDR termination supply ■ Graphic cards Package HTSSOP16 HTSSOP16 Rev 3 L6731D dedicated to DDR memory HTSSOP16 (exposed pad) Packaging Tube Tape and reel 1/23 www.st.com 23 ...
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... Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.8 Monitoring and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.9 HICCUP mode during an OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.10 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.11 Minimum on-time (TON, MIN Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.1 Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.2 Output capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.3 Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/23 L6731D ...
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... L6731D 1 Summary description The controller is an integrated circuit realized in BCD5 (BiCMOS-DMOS, version 5) fabrication that provides complete control logic and protection for high performance step-down DC-DC and niPoL converters designed to drive N-channel MOSFETs in a synchronous rectified buck topology. The output voltage of the converter can be precisely regulated down to 600 mV with a maximum tolerance of ± ...
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... Summary description 1.1 Functional description Figure 1. Block diagram 4/23 V =4.5V to14V CC OCL OCH VCC LDO Monitor SS/INH Protection and Ref OSC DDR-IN L6731D 0. PWM PGOOD + - + - VTTREF COMP V =1.8V to14V in VCCDR BOOT HGATE - PHASE LGATE PGND E/A SGND VFB L6731D Vo ...
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... L6731D 2 Electrical data 2.1 Maximum rating Table 2. Absolute maximum ratings Symbol BOOT - Boot voltage V PHASE V HGATE - V PHASE V BOOT BOOT PHASE V PHASE PHASE spike, transient < SS, FB, DDR-IN, SYNC, VTTREF, OCL, LGATE, COMP, V OCH pin Maximum withstanding voltage range PGOOD pin test condition: CDF-AEC-Q100-002 “human body model” ...
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... V EAREF CCDR %-100 % of V EAREF CCDR -> An internal clamp limits the maximum V captures the analog value present at this pin at the start-up when V meets the UVLO threshold. L6731D VCC VCCDR LGATE PGND BOOT HGATE PHASE OCH with resistor to obtain a logical input of the DDR ...
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... L6731D Table 4. Pin functions (continued) Pin n. Name 8 OCL 9 OCH 10 PHASE 11 HGATE 12 BOOT 13 PGND 14 LGATE 15 V CCDR Function A resistor connected from this pin to ground sets the valley- current-limit. The valley current is sensed through the low-side MOSFET(s). The internal current generator sources a current of 100 µA (I ...
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... V OCH V = 1.7 V OCH V =5 100 0 DIS th Vs. GND FΒ Vref = 0.6 V Guaranteed by design Guaranteed by design COMP = 10 pF Guaranteed by design L6731D Min Typ Max Unit 4.5 6.5 mA 8.5 10 4.0 4.2 4.4 V 3.6 3.8 4.0 V 1.1 1.25 1.47 V 0.9 1.05 1. ...
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... L6731D Table 5. Electrical characteristics (continued) Symbol Parameter Gate drivers R High side source resistance HGATE_ON R High side sink resistance HGATE_OFF R Low side source resistance LGATE_ON R Low side sink resistance LGATE_OFF Protections I OCH current source OCH I OCL current source OCL Over voltage trip ...
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... LDO during the recharge of the bootstrap capacitor. V CCDR Function). 10/23 Table 4. Pins function and section 4.3 Internal and pin (Figure CCDR LDO also represents a voltage reference for PGOOD pin (see 3.). . In this case V CCDR Figure 4. V pin must be filtered with CCDR Table 4. L6731D and CC Pins ...
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... L6731D 5.3 Bypassing the LDO to avoid the voltage drop with low Vcc ≈ the internal LDO works in dropout with an output resistance of about 1 Ω. The maximum LDO output current is about 100 mA and so the output voltage drop is 100 mV, to avoid this the LDO can be bypassed. ...
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... After that it becomes 10 µA until the final charge value of approximately 4 V (see Figure 6. Device start-up: voltage at the SS pin Vss 12/23 100K 2.5V are above their turn-ON thresholds (V IN 0.5V L6731D 0.6V/500KHz 0.6V/250KHz DDR-IN/2 250KHz Error Amplifier Ref. is monitored by the OCH IN with an internal current SS ...
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... L6731D The reference of the error amplifier is clamped with this voltage (Vss) until it reaches the programmed value. The L6731D can always sink or source current over current is detected during the soft-start phase, the device provides a constant-current-protection. In this way, in case of short soft-start time and/or small inductor value and/or high output ...
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... This implies that necessary, some pulses of the high-side MOSFET(s) will be skipped, guaranteeing a maximum current due to the following formula: 14/23 Table 4. Pins function): the OCH comparator triggers an over current the high-side MOSFET(s) is L6731D V OUT 109 LGate ...
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... The device can manage minimum on-times lower than 100ns. This feature comes down from the control topology and from the particular over-current-protection system of the L6731D. In fact voltage mode controller the current has not to be sensed to perform the regulation and, in the case of L6731D, neither for the over-current protection, given that − ...
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... Figure 10. shows a conversion from 0 500 kHz with a T Figure 10 -> 0 500 kHz The on-time is limited by the turn-on and turn-off times of the MOSFETs. 16/23 50ns L6731D of about 50 ns OUT I L VPHASE ...
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... Vout COUT ⋅ ⋅ 2 Cout ( Vin , min ∆ 2 Iout ∆ = Vout COUT ⋅ ⋅ 2 Cout is the maximum duty cycle value that in the L6731D is 100%. MAX Application details ) between 20 % and the L Vout Vin ⋅ ESR ⋅ ⋅ − D max Vout ) ⋅ L Vout ...
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... COMP . This function has a double pole at frequency F COMP ⋅ ⋅ 8 Cout Fsw ⋅ − with D = 0.5. OUT ⋅ 2 Iout ) 18.). The output voltage is regulated to at the PHASE node. This waveform IN depending on the LC divided by the peak-to-peak oscillator IN L6731D ...
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... L6731D Figure 11. Compensation network The compensation network consists in the internal error amplifier, the impedance networks Z (R3, R4 and C20) and Z IN provide a closed loop transfer function with the highest 0 dB crossing frequency to have fastest transient response (but always lower than fsw/10) and the highest gain in DC conditions to minimize the load regulation error. A stable control loop has a gain crossing the 0 dB axis with -20 dB/decade slope and a phase margin greater than 45 ° ...
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... Z1 ω Place at the output filter resonance Z2 ω Place at the output capacitor ESR zero P1 ω Place at one half of the switching frequency; P2 Check the loop gain considering the error amplifier open loop gain ϖ ⋅ LC ω ω ω ; ESR L6731D ...
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... L6731D 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... Revision history 8 Revision history Table 7. Document revision history Date 21-Dec-2005 31-May-2006 04-Jun-2008 22/23 Revision 1 Initial release. 2 New template, thermal data updated Updated: Table 4 on page 3 11, Figure 13 on page 21 Changes 6, Table 5 on page 8, Section 5.4 on page L6731D ...
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... L6731D Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...