PM6680A STMicroelectronics, PM6680A Datasheet

IC CTLR DUAL SYNC STDN 5X5VFQFPN

PM6680A

Manufacturer Part Number
PM6680A
Description
IC CTLR DUAL SYNC STDN 5X5VFQFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of PM6680A

Applications
Controller, Embedded Computer System
Voltage - Input
6 ~ 36 V
Number Of Outputs
2
Voltage - Output
0.9 ~ 5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, 32-VFQFPN
For Use With
497-6379 - BOARD EVALUATION FOR PM6680A497-6378 - BOARD EVALUATION FOR PM6680497-6425 - BOARD EVAL BASED ON PM6680A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
Applications
Table 1.
December 2007
6 V to 36 V input voltage range
Adjustable output voltages
5V LDO delivers 100 mA peak current
1.237 V
externally
Current sensing using low side MOSFETs
R
Valley current sensing
Soft-start internally fixed at 2ms
Soft output discharge
Latched OVP and UVP
Selectable pulse skipping at light loads
Selectable minimum frequency (33 kHz) in
pulse skip mode
5mW maximum quiescent power
Independent power good signals
Output voltage ripple compensation
Thermal shutdown
Embedded computer system
FPGA system power
Industrial applications on 24 V
High performance and high density DC/DC
modules
DS(on)
Order codes
PM6680ATR
±
Device summary
PM6680A
1 % reference voltage available
VFQFPN-32 5X5 (exposed pad)
with adjustable output voltages plus LDO
Dual synchronous step-down controller
Package
Rev 2
Description
PM6680A is a dual step-down controller
specifically designed to provide extremely high
efficiency conversion, with loss less current
sensing technique. The constant on-time
architecture assures fast load transient response
and the embedded voltage feed-forward provides
nearly constant switching frequency operation. An
embedded integrator control loop compensates
the DC voltage error due to the output ripple.
Pulse skipping technique increases efficiency at
very light load. Moreover a minimum switching
frequency of 33 kHz is selectable to avoid audio
noise issues. The PM6680A provides a selectable
switching frequency, allowing three different
values of switching frequencies for the two
switching sections. The output voltages OUT1
and OUT2 can be adjusted from 0.9 V to 5 V and
from 0.9 V to 3.3 V respectively.
VFQFPN-32 5X5
Tape and reel
Packaging
PM6680A
Tube
www.st.com
1/48
48

Related parts for PM6680A

PM6680A Summary of contents

Page 1

... DC voltage error due to the output ripple. Pulse skipping technique increases efficiency at very light load. Moreover a minimum switching frequency of 33 kHz is selectable to avoid audio noise issues. The PM6680A provides a selectable switching frequency, allowing three different values of switching frequencies for the two switching sections. The output voltages OUT1 and OUT2 can be adjusted from 0 ...

Page 2

... Pulse skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.5 No-audible skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.6 Current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.7 Soft start and soft end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8 Gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7.9 Reference voltage and bandgap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.10 Internal linear regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.11 Power up sequencing and operative modes . . . . . . . . . . . . . . . . . . . . . . . 28 8 Monitoring and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2/48 PM6680A ...

Page 3

... PM6680A 9 Design guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 9.1 Switching frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 9.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 9.3 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9.4 Input capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 9.5 Power MOSFETS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 9.6 Closing the integrator loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 9.7 Other parts design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 9.8 Design example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Contents 3/48 ...

Page 4

... LINEAR GENERATOR REGULATOR LDO5 ENABLE LEVEL OUT2 SHIFTER SMPS CONTROLLER STARTUP CONTROLLER UVLO + UVLO UVLO LEVEL OUT1 SHIFTER SMPS CONTROLLER LDO5 LDO5 ENABLE TERMIC TERMIC FAULT CONTROLLER PM6680A LDO5 V5SW FB1 OUT1 BOOT1 HGATE1 PHASE1 CSENSE1 COMP1 LGATE1 PGOOD1 EN1 ...

Page 5

... PM6680A 2 Pin settings 2.1 Connections Figure 2. Pin connection (through top view) 1 PM6680A Pin settings 5/48 ...

Page 6

... Power ground. This pin must be connected to the power ground plan of the power 14 PGND supply. 15 LGATE1 Low-side gate driver output for the section 1. Signal ground for analog circuitry. It must be connected to the signal ground plan of 16 SGND2 the power supply. 6/48 Function sensing) to obtain DSON PM6680A ...

Page 7

... PM6680A Table 2. Pin functions (continued) N° Pin Internal 5 V regulator bypass connection. • If V5SW is connected to OUT5 ( external 5 V supply) and V5SW is greater 17 V5SW than 4.9 V, the LDO5 regulator shuts down and the LDO5 pin is directly connected to OUT5 through a 3 Ω (max) switch. ...

Page 8

... Thermal data Table 4. Thermal data Symbol R thJA T STG T J 8/48 Parameter = 25ºC A Parameter Thermal resistance junction to ambient Storage temperature range Junction operating temperature range PM6680A Value - (1) -0.6 to36 -0 0.3 (2) -0.3 to LDO5 +0.3 -0.3 to Vcc+0.3 -0.3 to 0.3 -0 2.8 VIN ±1000 Other pins ± ...

Page 9

... PM6680A 4 Electrical characteristics Table 5. Electrical characteristics T = -40 °C to 125 °C, unless otherwise specified. All parameters at operating temperature A extremes are guaranteed by design and statistical analysis (not production tested). Symbol Parameter Supply section VIN Input voltage range V IC supply voltage CC V Turn-ON voltage threshold ...

Page 10

... IREF < 100 µA Falling edge of REF Normal mode Pulse skip mode (2) Both SMPS, 6V < V < 36V < V < < ILDO5 < < V < ILDO5 = VLDO5 > UVLO PM6680A Min Typ Max 595 700 805 190 225 260 400 470 545 145 170 200 300 ...

Page 11

... PM6680A Table 5. Electrical characteristics (continued -40 °C to 125 °C, unless otherwise specified. All parameters at operating temperature A extremes are guaranteed by design and statistical analysis (not production tested). Symbol Parameter High and low gate drivers HGATE driver on-resistence LGATE driver on-resistance PGOOD pins UVP/OVP protections ...

Page 12

... VIN = 24 V, SHDN, EN1 and EN2 high, OUT1 = 3.3 V, OUT2 = 1 load unless specified) Figure 3. OUT1 = 3.3 V efficiency Figure 5. PWM no load battery current vs input voltage 12/48 Figure 4. OUT2 = 1.8 V efficiency Figure 6. Skip no load battery current vs input voltage PM6680A ...

Page 13

... PM6680A Figure 7. No-audible skip no load battery current vs input voltage Figure 9. Shutdown mode input battery current vs input voltage Figure 11. OUT1 = 3.3 V switching frequency Typical operating characteristics Figure 8. Standby mode input battery current vs input voltage Figure 10. LDO5 vs output current Figure 12. OUT2 = 1.8 V switching frequency ...

Page 14

... Typical operating characteristics Figure 13. OUT1 = 3.3 V load regulation Figure 15. Voltage reference vs load current Figure 17. OUT1 = 3.3V load transient 0 14/48 Figure 14. OUT2 = 1.8 V load regulation Figure 16. OUT1, OUT2 and LDO5 Power-Up → 2A Figure 18. OUT2 = 1.8V load transient 0 PM6680A → 2A ...

Page 15

... PM6680A Figure 19. 3.3 V soft start (1Ω load) Figure 21. OUT1 = 3.3 V soft end (no load) Figure 23. OUT1 = 3.3 V soft end (0.8 load) Typical operating characteristics Figure 20. 1.8 V soft start (0.6Ω load) Figure 22. OUT2 = 1.8 V soft end (no load) Figure 24. OUT2 = 1.8 V soft end (0.6 load) ...

Page 16

... Typical operating characteristics Figure 25. 3.3 V no-audible skip mode 16/48 Figure 26. 1.8 V no-audible skip mode PM6680A ...

Page 17

... PM6680A 6 Application schematic Figure 27. Simplified application schematic VIN 19 LDO5 18 VCC Application schematic FSEL 3 SKIP 24 VREF 32 EN1 25 EN2 17/48 ...

Page 18

... In order to maximize the efficiency at light load condition, a pulse skipping mode can be selected. The PM6680A includes also linear regulator (LDO5) that can power the switching drivers. If the output OUT1 regulates order to maximize the efficiency in higher consumption status, the linear regulator can be turned off and their outputs can be supplied directly from the switching outputs ...

Page 19

... PM6680A Figure 28. Constant ON time PWM control The duty cycle of the buck converter in steady state is: Equation 2 The PWM control works at a nearly fixed frequency f Equation 3 As mentioned the steady state switching frequency is theoretically independent from input voltage and from output voltage. Actually the frequency depends on parasitic voltage drops that are present during the charging path(high side switch resistance, inductor resistance(DCR)) and discharging path(low side switch resistance, DCR) ...

Page 20

... A minimum on-time (130 ns) is also introduced to assure the start-up switching sequence. PM6680A has a one-shot generator for each power section that turns on the high side MOSFET when the following conditions are satisfied simultaneously: the PWM comparator is high, the synchronous rectifier current is below the current limit threshold, and the minimum off-time has timed out ...

Page 21

... PM6680A 7.3 Output ripple compensation and loop stability In a classic constant on time control, the system regulates the valley value of the output voltage and not the average value, as shown in voltage ripple is source static error. To compensate this error, an integrator network can be introduced in the control loop, by ...

Page 22

... When the output ripple reaches the regulated voltage Vreg, a new cycle begins. The off cycle duration and the switching frequency depend on the load condition result of the control technique, losses are reduced at light loads, improving the system efficiency. 22/ – IN OUT ( ) × ----------------------------- - ILOAD SKIP = T × PM6680A ...

Page 23

... PM6680A 7.5 No-audible skip mode If SKIP pin is tied kHz is enabled. At light load condition, If there is not a new switching cycle within a 30 µs (typ.) period, a no-audible skip mode cycle begins. Figure 32. No audible skip mode The low side switch is turned on until the output voltage crosses about Vreg + 1 %. Then the high side MOSFET is turned on for a fixed on time period ...

Page 24

... Moreover the maximum DC load is equal to the valley current limit plus half of the inductor ripple current: Equation 6 The output current limit depends on the current ripple, as shown in Figure 34. Current waveforms in current limit conditions 24/48 (Figure 33). HGATE HS PHASE Rcsense CSENSE LGATE LS RDS on ∆ (max) I LOAD Lvalley 2 PM6680A Figure 34: ...

Page 25

... Lvalley Where RSNS is the sensing element(RDSon) PM6680A provides also a fixed negative peak current limit to prevent an excessive reverse inductor current when the switching section sinks current from the load in PWM mode. This negative current limit threshold is measured between PHASE and SGND pins, comparing the magnitude drop on the PHASE node during the conduction time of the low side MOSFET with an internal fixed voltage of 120 mV ...

Page 26

... V. The power dissipation of the drivers is a function of the total gate charge of the external power MOSFETs and the switching frequency, as shown in the following equation: Equation 11 Where V is the 5 V driver supply. driver 26/48 × × driver driver g SW PM6680A ...

Page 27

... Internal linear regulator The PM6680A has an internal linear regulator providing 5 V (LDO5) at ± accuracy. High side drivers, low side drivers and most of internal circuitry are supplied by LDO5 output through VCC pin (an external RC filter may be applied between LDO5 and VCC). The linear regulator can provide an average output current and a peak output current of 100 mA. Bypass LDO5 output with a minimum 1µ ...

Page 28

... SHDN pin is high Shutdown SHDN is low 28/48 Conditions Switching regulators are enabled; internal linear regulators outputs are enabled. Internal Linear regulators active (LDO5 is always on). In Standby mode LGATE1/LGATE2 pins are forced high while HGATE1/HGATE2 pins are forced low. All circuits off. PM6680A Description ...

Page 29

... Thermal protection The PM6680A has a thermal protection to preserve the device from overheating. The thermal shutdown occurs when the die temperature goes above +150 °C. In this case all internal circutry is turned off and the power sections are turned off after the discharge mode. ...

Page 30

... RMS current greater than the maximum RMS inductor current I Equation 13 Where ∆I is the maximum ripple current: L(max) 30/48 . INmax − × IN OUT OUT L × ∆ the input voltage ∆ (max (max)) LRMS LOAD PM6680A . LOAD(max The maximum ∆I LOAD(max the output voltage and OUT : LRMS 2 12 ...

Page 31

... PM6680A Equation 14 If hard saturation inductors are used, the inductor saturation current should be much greater than the maximum inductor peak current Ipeak: Equation 15 Using soft saturation inductors it's possible to choose inductors with saturation current limit nearly to Ipeak. Below there is a list of some inductor manufacturers. ...

Page 32

... TAYIO YUDEN TAYIO YUDEN 32/48 Capacitor value Series (uF) POSCAP TPB, TPD, 100 to 470 TPE SPCAP UD, UE 100 to 470 = × × − CinRMS Series UMK325BJ106KM-T GMK325BJ106MN Rated voltage (V) ESR max (mΩ) 2 6.3 + × × − Capacitor value (uF) Rated voltage ( PM6680A ...

Page 33

... PM6680A 9.5 Power MOSFETS Logic-level MOSFETs are recommended, since low side and high side gate drivers are powered by LDO5. Their breakdown voltage VBR In notebook applications, power management efficiency is a high level requirement. The power dissipation on the power switches becomes an important factor in switching selections ...

Page 34

... Type R (mΩ) DSon STS4DNF60L 50 Forward voltage Series (V) STPS1L40M 0.5 ⎞ ⎟ ⎟ × (max) LOAD ⎠ max ). RSS C Rated reverse voltage RSS -------------- C (V) GS 0.0625 60 Gate charge Rated reverse voltage (nC) ( minimum recovery INmax Rated reverse Reverse current voltage (V) (uA) 40 PM6680A 21 ...

Page 35

... PM6680A 9.6 Closing the integrator loop The design of external feedback network depends on the output voltage ripple. If the ripple is higher than approximately 30 mV, the feedback network ( keep the loop stable. Figure 36. Circuitry for output ripple compensation Vr OUTPUT VOLTAGE The stability of the system depends firstly on the output capacitor zero frequency. ...

Page 36

... RIPPLEout INT C INT is the output ripple and q is the attenuation factor of the output ripple. Figure 37 Vr × V OUT that, together with C filt INT must be much greater (10 or more CUT 1 × INT filt + C C INT filt = × INT RIPPLEout C filt . PM6680A , realize a ...

Page 37

... PM6680A Figure 37. Virtual ESR network ∆V ∆V Output Output voltage voltage ∆V ∆ The T node voltage is the sum of the output voltage and the triangular waveform generated by the virtual ESR network. In fact the virtual ESR network behaves like a further equivalent ESR. A good trade-off is to design the network in order to achieve an R Equation 28 where ∆ ...

Page 38

... We choose equations 30, 33 and Cfilt = 47 pF, INT 1 × R TOT and the equivalent ESR given out k × out TOT Vr × ⎞ V − ⎟ ⎟ OUT f Z ⎠ C INT × C ⎞ 1 ⎟ ⎟ × π × ⎠ × π × PM6680A ...

Page 39

... PM6680A 9.7 Other parts design ● VIN filter A VIN pin low pass filter is suggested to reduce switching noise. The low pass filter is shown in the next figure: Figure 38. VIN pin filter Typical components values are 3.9 Ω and C = 4.7 µF. ● VCC filter A VCC low pass filter helps to reject switching commutations noise: Figure 39 ...

Page 40

... We choose standard value L= 8.2 µH. ∆I = 1.16 A @VIN = 24 V. L(max 2.523 A LRMS 3.83 A peak OUT2:ILOAD=2 ripple current. 40/ must provide the total gate charge to the high BOOT . INmax on the BOOT pin could be added in order to reduce noise when the phase Table 6 ). PM6680A ...

Page 41

... PM6680A Equation 37 We choose standard value L=4.7 µH. ∆I = 0.886 A @VIN =24 V. L(max 2.523 A LRMS 3.83 A peak 2. Output capacitor selection We would like to have an output ripple smaller than 25 mV. OUT1: POSCAP 4TPE150MI OUT2: POSCAP 6TPE220M 3. Power MOSFETs OUT1:High side: STS5NF60L Low side: STS7NF60L ...

Page 42

... Layout guidelines The layout is very important in terms of efficiency, stability and noise of the system possible to refer to the PM6680A demoboard for a complete layout example. For good PC board layout follows these guidelines: ● Place on the top side all the power components (inductors, input and output capacitors, MOSFETs and diodes) ...

Page 43

... PM6680A Figure 41. Current paths, ground connection and driver traces layout Design guidelines 43/48 ...

Page 44

... Place the current sense traces on the bottom side. Using It is recommended to use a dedicated connection between the switching node and the current limit resistor R . CSENSE 44/48 PM6680A ...

Page 45

... PM6680A 10 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 46

... Package mechanical data Figure 42. Package dimensions 46/48 PM6680A ...

Page 47

... PM6680A 11 Revision history Table 18. Document revision history Date 12-Oct-2006 17-Dec-2007 Revision 1 Initial release. Added Section 5: Typical operating characteristics on page 12 2 Section 9: Design guidelines on page 30 Revision history Changes and 47/48 ...

Page 48

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 48/48 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com PM6680A ...

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