ADP3209CJCPZ-RL ON Semiconductor, ADP3209CJCPZ-RL Datasheet
ADP3209CJCPZ-RL
Specifications of ADP3209CJCPZ-RL
Related parts for ADP3209CJCPZ-RL
ADP3209CJCPZ-RL Summary of contents
Page 1
FEATURES Single-chip solution Fully compatible with the Intel® GMCH chipset voltage regulator specifications Integrated MOSFET drivers ±8 mV worst-case differentially sensed core voltage error over temperature Automatic power-saving modes maximize efficiency during light load operation Soft transient control reduces inrush ...
Page 2
... VID Change and Soft Transient................................................16 Current Limit, Short-Circuit, and Latch-Off Protection.......17 Output Crowbar ..........................................................................18 REVISION HISTORY 01/08 - Rev 2: Conversion to ON Semiconductor 9/07—Rev. Sp0 to Rev. SpA Changes to Absolute Maximum Ratings........................................7 Change to Table 3 ..............................................................................8 Change to the Setting the Clock Frequency for PWM Section.......22 Changes to Ordering Guide.....................................................................32 10/06— ...
Page 3
VCC = 5 V, FBRTN = GND, VARFREQ = low, V the device) has a positive sign. Table 1. Parameter VOLTAGE ERROR AMPLIFIER 2 Output Voltage Range COMP Clamp DC Accuracy Load Line Positioning Accuracy LLINE Input Bias Current Differential ...
Page 4
Parameter SWITCH AMPLIFIER 2 Common-Mode Range Input Resistance Input Current Zero Current Switching Threshold DCM Minimum Off Time Masking CURRENT LIMIT COMPARATOR 2 Output Voltage Range Output Current Current Limit Threshold Voltage Current Limit Setting Ratio SOFT START/LATCH-OFF TIMER Output ...
Page 5
Parameter HIGH-SIDE MOSFET DRIVER Output Resistance, Sourcing Current Output Resistance, Sinking Current Transition Times Dead Delay Times BST Quiescent Current LOW-SIDE MOSFET DRIVER Output Resistance, Sourcing Current Output Resistance, Sinking Current Transition Times Propagation Delay Times SW Transition Timeout Zero-Crossing ...
Page 6
Timing is referenced to the 90% and 10% points, unless otherwise noted. IN tpdl DRVL DRVL DRVH (WITH RESPECT TO SW DRVL tpdh tr DRVH DRVH V TH Figure 2. Timing Diagram Rev Page 6 of ...
Page 7
Table 2. Parameter VCC FBRTN, PGND BST DC t < 200 ns DRVH < 200 ns DRVL to PGND DC t < 200 ns RAMP (in Shutdown < 200 ns All Other Inputs and Outputs ...
Page 8
Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 FBRTN Feedback Return Input/Output. This pin remotely senses the GMCH voltage also used as the ground return for the VID DAC and the voltage error amplifier blocks. 2 ...
Page 9
Pin No. Mnemonic Description 21 SW Current Return For High-Side Gate Drive. 22 DRVH High-Side Gate Drive Output. 23 BST High-Side Bootstrap Supply. A capacitor from this pin to SW holds the bootstrapped voltage while the high-side MOSFET is on. ...
Page 10
20°C to 100°C, unless otherwise noted. VID 12V 19V LOAD CURRENT ...
Page 11
MEASURED LOAD LINE 1.30 1.25 SPECIFIED LOAD LINE 1.20 1. LOAD CURRENT (A) Figure 10. Load Line Accuracy VCC VOLTAGE (V) Figure 11. VCC Current ...
Page 12
OUTPUT VOLTAGE SWITCH NODE 2 LOAD CURRENT 1 CH1 100mV CH2 10.0V~ M2.00—s A CH1 CH4 20.0mV T 20.00% Figure 16. Load Transient OUTPUT VOLTAGE VID 0 1 CH1 1.00V M40.0—s ...
Page 13
The ADP3209 is a ramp-pulse-modulated (RPM) controller for synchronous buck Intel GMCH core power supply. The internal 5-bit VID DAC conforms to the Intel IMVP-6+ specifications. The ADP3209 is a stable, high performance architecture that includes • High speed response ...
Page 14
× RAMP CLOCK OSCILLATOR C R VCC A D 0.2V RAMP COMP GATE DRIVER BST DRVH FLIP-FLOP DRVL RD VDC + – – + ...
Page 15
Master Clock Frequency in PWM Mode When the ADP3209 runs in PWM, the clock frequency is set by an external resistor connected from the RT pin to GND. The frequency varies with the VID voltage: the lower the VID voltage, ...
Page 16
VOLTAGE CONTROL MODE A high-gain bandwidth error amplifier is used for the voltage mode control loop. The noninverting input voltage is set via the 5-bit VID DAC. The VID codes are listed in Table 4. The noninverting input voltage is ...
Page 17
DAC. The ST buffer input recognizes the almost instantaneous VID voltage change and tries to track it. However, tracking is not instantaneous because the slew rate of the buffer is limited by the source and sink ...
Page 18
V, as seen just before t switch voltage is approximately −6 mV, the low-side FET is turned off. Figure 29 shows a small, dampened ringing the LC created from capacitance on the switch ...
Page 19
The V voltage is monitored through the CSREF pin. When the CCGFX CSREF pin voltage drops to less than −300 mV, the ADP3209 triggers the RVP function by setting both DRVH and DRVL ...
Page 20
Table 4. VID Codes Enable VID4 VID3 VID2 VID1 ...
Page 21
VID4 VID3 VID2 VID1 VID0 VR_ON Figure 34. Typical Application Circuit Rev Page www.onsemi.com 06375-034 ...
Page 22
The design parameters for a typical IMVP-6+-compliant GPU core VR application are as follows: • Maximum input voltage ( INMAX • Minimum input voltage ( INMIN • Output voltage by VID setting ...
Page 23
INDUCTOR SELECTION The choice of inductance determines the ripple current of the inductor. Less inductance results in more ripple current, which increases the output ripple voltage and the conduction losses in the MOSFETs. However, this allows the use of smaller-size ...
Page 24
The standard 1% resistor for R is 51.1 kΩ the DCR of the inductor is used as a sense element and ...
Page 25
C SELECTION OUT The required output decoupling for processors and platforms is typically recommended by Intel. For systems containing both bulk and ceramic capacitors, however, the following guidelines can be a helpful supplement. Select the number of ceramics and determine ...
Page 26
POWER MOSFETS For typical 15 A per phase applications, the N-channel power MOSFETs are selected for one high-side switch and one low- side switch. The main selection parameters for the power MOSFETs are ...
Page 27
RAMP RESISTOR SELECTION The ramp resistor ( used to set the size of the internal PWM R ramp. The value of this resistor is chosen to provide the best combination of stability and transient response. Use the following ...
Page 28
With the multimode feedback structure of the ADP3209 necessary to set the feedback compensation so that the converter’s output impedance works in parallel with the output decoupling. In addition necessary to compensate for the several poles ...
Page 29
C SELECTION AND INPUT CURRENT IN di/dt REDUCTION In continuous inductor-current mode, the source current of the high-side MOSFET is approximately a square wave with a duty ratio equal prevent large voltage transients, use a low ESR ...
Page 30
be necessary to try several parallel values to obtain an adequate one because there are limited standard capacitor values available ( good idea to have locations for two capacitors in the layout for this reason). = × ( ...
Page 31
The components around the ADP3209 should be located close to the controller with short traces. The most important traces to keep short and away from other traces are those to the FB and CSFB pins. Refer to Figure 35 ...
Page 32
... Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi ...