IC PWR SUPPLY DDR 28-TQFN

MAX8632ETI+T

Manufacturer Part NumberMAX8632ETI+T
DescriptionIC PWR SUPPLY DDR 28-TQFN
ManufacturerMaxim Integrated Products
MAX8632ETI+T datasheet
 


Specifications of MAX8632ETI+T

ApplicationsController, DDRVoltage - Input2 ~ 28 V
Number Of Outputs1Voltage - Output1.8V, 2.5V, 0.7 ~ 5.5 V
Operating Temperature-40°C ~ 85°CMounting TypeSurface Mount
Package / Case28-TQFN Exposed PadOutput Voltage1.8 V, 2.5 V, 0.7 V to 5.5 V
Output Current15 AInput Voltage2 V to 28 V
Mounting StyleSMD/SMTMaximum Operating Temperature+ 85 C
Minimum Operating Temperature- 40 CLead Free Status / RoHS StatusLead free / RoHS Compliant
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Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
Overvoltage Protection (OVP)
When the output voltage rises above 116% of the nomi-
nal regulation voltage and OVP is enabled (OVP/UVP =
AV
or open), the OVP circuit sets the fault latch,
DD
shuts down the PWM controller, and immediately pulls
DH low and forces DL high. This turns on the synchro-
nous-rectifier MOSFET (Q2 in Figure 8) with a 100%
duty cycle, rapidly discharging the output capacitor
and clamping the output to ground. Once the output
reaches 0.1V, DL is switched off, preventing the possi-
bility of a negative voltage on the output. Toggle SHDN
or cycle AV
below 1V to clear the fault latch and
DD
restart the controller. OVP is disabled when OVP/UVP is
connected to REF or GND (see Table 3). OVP only
applies to the buck output. The VTT and VTTR outputs
do not have overvoltage protection.
Undervoltage Protection (UVP)
When the output voltage drops below 70% of its regula-
tion voltage while UVP is enabled, the controller sets
the fault latch and begins the discharge mode (see the
SHDN and Output Discharge section). UVP is ignored
for at least 10ms (min) after startup or after a rising
edge on SHDN. Toggle SHDN or cycle AV
below 1V to clear the fault latch and restart the con-
troller. UVP is disabled when OVP/UVP is left open or
connected to GND (see Table 3). UVP only applies to
the buck output. The VTT and VTTR outputs do not
have undervoltage protection.
Thermal Fault Protection
The MAX8632 features two thermal-fault-protection cir-
cuits. One monitors the buck-regulator portion of the IC
and the other monitors the linear regulator (VTT) and
the reference buffer output (VTTR). When the junction
Table 3. OVP/UVP Fault Protection
OVP/UVP
DISCHARGE
Yes.
AV
Output is discharged through an
DD
internal 10Ω resistance.
Yes.
OPEN
Output is discharged through an
internal 10Ω resistance.
No.
REF
DL forced low when SHDN is low.
No.
GND
DL forced low when SHDN is low.
______________________________________________________________________________________
temperature of the buck-regulator portion of the
MAX8632 rises above +160°C, a thermal sensor acti-
vates the fault latch, pulls POK1 low, and shuts down
the buck-controller output using discharge mode
regardless of the OVP/UVP setting. Toggle SHDN or
cycle AV
below 1V to reactivate the controller after
DD
the junction temperature cools by 15°C. If the VTT and
VTTR regulator portion of the IC has its die temperature
rise above +160°C, then VTT and VTTR shut off, go
high impedance, and restart after the die portion of the
IC cools by 15°C. Both thermal faults are independent.
For example, if the VTT output is overloaded to the
point that it triggers its thermal fault, the buck regulator
continues to function.
Firmly establish the input voltage range (V
mum load current (I
choosing a switching frequency and inductor operating
point (ripple current ratio or LIR). The primary design
trade-off lies in choosing a good switching frequency
and inductor operating point, and the following four fac-
tors dictate the rest of the design:
power
DD
• Input Voltage Range. The maximum value (V
must accommodate the worst-case voltage. The mini-
mum value (V
IN(MIN)
voltage after drops due to connectors and fuses. If
there is a choice, lower input voltages result in better
efficiency.
• Maximum Load Current. There are two values to con-
sider. The peak load current (I
instantaneous component stresses and filtering
requirements and thus drives output capacitor selec-
tion, inductor saturation rating, and the design of the
UVP PROTECTION
Enabled
Disabled
Enabled
Disabled
Design Procedure
) and maxi-
IN
) in the buck regulator before
LOAD
IN(MAX)
) must account for the lowest
) determines the
PEAK
OVP PROTECTION
Enabled
Enabled
Disabled
Disabled
17
)