MAX8632ETI+T  

Manufacturer Part Number  MAX8632ETI+T 
Description  IC PWR SUPPLY DDR 28TQFN 
Manufacturer  Maxim Integrated Products 
MAX8632ETI+T datasheet 

Specifications of MAX8632ETI+T  

Applications  Controller, DDR  Voltage  Input  2 ~ 28 V 
Number Of Outputs  1  Voltage  Output  1.8V, 2.5V, 0.7 ~ 5.5 V 
Operating Temperature  40°C ~ 85°C  Mounting Type  Surface Mount 
Package / Case  28TQFN Exposed Pad  Output Voltage  1.8 V, 2.5 V, 0.7 V to 5.5 V 
Output Current  15 A  Input Voltage  2 V to 28 V 
Mounting Style  SMD/SMT  Maximum Operating Temperature  + 85 C 
Minimum Operating Temperature   40 C  Lead Free Status / RoHS Status  Lead free / RoHS Compliant 
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Integrated DDR PowerSupply Solution for
Desktops, Notebooks, and Graphic Cards
where V
= V
= 5V. In addition to the losses above,
GS
DD
allow about 20% more for additional losses because of
MOSFET output capacitances and lowside MOSFET
bodydiode reverserecovery charge dissipated in the
highside MOSFET that is not well defined in the
MOSFET data sheet. Refer to the MOSFET data sheet
for thermalresistance specifications to calculate the PC
board area needed to maintain the desired maximum
operating junction temperature with the abovecalculat
ed power dissipations. To reduce EMI caused by
switching noise, add a 0.1µF ceramic capacitor from the
highside switch drain to the lowside switch source, or
add resistors in series with DH and DL to slow down the
switching transitions. Adding series resistors increases
the power dissipation of the MOSFET, so ensure that
this does not overheat the MOSFET.
MOSFET Snubber Circuit (Buck)
Fast switching transitions cause ringing because of a
resonating circuit formed by the parasitic inductance
and capacitance at the switching nodes. This highfre
quency ringing occurs at LX’s rising and falling transi
tions and can interfere with circuit performance and
generate EMI. To dampen this ringing, an optional
series RC snubber circuit is added across each switch.
Below is a simple procedure for selecting the value of
the series RC of the snubber circuit:
1) Connect a scope probe to measure V
and observe the ringing frequency, f
2) Estimate the circuit parasitic capacitance (C
LX by first finding a capacitor value, which, when
connected from LX to PGND1, reduces the ringing
frequency by half. C
can then be calculated as
PAR
1/3rd the value of the capacitor value found.
3) Estimate the circuit parasitic inductance (L
the equation:
1
=
L
PAR
(
)
2
π
×
×
2
f
C
R
4) Calculate the resistor for critical dampening (R
= 2π × f
from the equation: R
SNUB
the resistor value up or down to tailor the desired
damping and the peak voltage excursion.
5) The capacitor (C
) should be at least 2 to 4
SNUB
times the value of C
to be effective.
PAR
22
______________________________________________________________________________________
The power loss of the snubber circuit (P
pated in the resistor and can be calculated as:
P
where V
is the input voltage and f
IN
frequency. Choose an R
the specific application’s derating rule for the power
dissipation calculated.
The currentsense method used in the MAX8632 makes
use of the onresistance (R
MOSFET (Q2 in Figure 8). When calculating the current
limit, use the worstcase maximum value for R
the MOSFET data sheet, and add some margin for the
rise in R
DS(ON)
to allow 0.5% additional resistance for each 1°C of tem
perature rise.
The minimum currentlimit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val
ley of the inductor current occurs at I
half the ripple current; therefore:
I
LIM VAL
(
to PGND1,
LX
.
R
where I
LIM(VAL)
) at
PAR
threshold voltage divided by the onresistance of Q2
(R
DS(ON)Q2
to AV
. In adjustable mode, the valley currentlimit
DD
threshold is precisely 1/10th* the voltage seen at ILIM.
For an adjustable threshold, connect a resistive divider
from REF to GND with ILIM connected to the center tap.
) from
PAR
The external 250mV to 2V adjustment range corresponds
to a 25mV to 200mV valley currentlimit threshold. When
adjusting the current limit, use 1% tolerance resistors and
a divider current of approximately 10µA to prevent signifi
PAR
cant inaccuracy in the valley currentlimit tolerance.
)
SNUB
x L
. Adjust
R
PAR
Alternately, foldback current limit can be implemented
if the UVP latch option is not available. Foldback cur
rent limit reduces the power dissipation of external
components so they can withstand indefinite overload
and short circuit, with automatic recovery after the over
load or short circuit is removed. To implement foldback
current limit, connect a resistor from V
in Figures 7 and 8), in addition to the resistordivider
*In the negative direction, the adjustable current limit is typically
1/8th the voltage seen at ILIM.
RSNUB
2
=
×
×
C
V
f
RSNUB
SNUB
IN
SW
is the switching
SW
power rating that meets
SNUB
Setting the Current Limit (Buck)
) of the lowside
DS(ON)
DS(ON)
with temperature. A good general rule is
LOAD(MAX)
×
I
LIR
LOAD MAX
(
)
>
I

)
LOAD MAX
(
)
2
equals the minimum valley currentlimit
). For the 50mV default setting, connect ILIM
Foldback Current Limit
to ILIM (R6
OUT
) is dissi
from
minus
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