ISL6561CR Intersil, ISL6561CR Datasheet

IC CTRLR PWM MULTIPHASE 40-QFN

ISL6561CR

Manufacturer Part Number
ISL6561CR
Description
IC CTRLR PWM MULTIPHASE 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6561CR

Applications
Controller, Intel VR10X
Voltage - Input
3 ~ 12 V
Number Of Outputs
4
Voltage - Output
0.84 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Multi-Phase PWM Controller with
Precision r
Current Sensing for VR10.X Application
The ISL6561 controls microprocessor core voltage regulation
by driving up to 4 synchronous-rectified buck channels in
parallel. Multi-phase buck converter architecture uses
interleaved timing to multiply channel ripple frequency and
reduce input and output ripple currents. Lower ripple results in
fewer components, lower component cost, reduced power
dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates. The ISL6561 features a high
bandwidth control loop and ripple frequencies of >4MHz to
provide optimal response to the transients.
Today’s microprocessors require a tightly regulated output
voltage position versus load current (droop). The ISL6561
senses current by utilizing patented techniques to measure
the voltage across the on resistance, r
MOSFETs or DCR of the output inductor during the lower
MOSFET conduction intervals. Current sensing provides the
needed signals for precision droop, channel-current
balancing, and overcurrent protection.
The accuracy of the current-sensing method is enhanced by
the ISL6561’s temperature compensation function. Droop
accuracy can be affected by increasing r
elevated temperature. The ISL6561 uses an internal
temperature-sensing element to provide programmable
temperature compensation. Correctly applied, temperature
compensation can completely nullify the effect of r
DCR temperature sensitivity.
A unity gain, differential amplifier is provided for remote
voltage sensing. Any potential difference between remote
and local grounds can be completely eliminated using the
remote-sense amplifier. Eliminating ground differences
improves regulation and protection accuracy. The threshold-
sensitive enable input is available to accurately coordinate
the start up of the ISL6561 with any other voltage rail.
Dynamic-VID™ technology allows seamless on-the-fly VID
changes. The offset pin allows accurate voltage offset
settings that are independent of VID setting. The ISL6561
uses 5V bias and has a built-in shunt regulator to allow 12V
bias using only a small external limiting resistor.
DS(ON)
or DCR Differential
®
1
Data Sheet
DS(ON)
DS(ON)
Dynamic VID™ is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002-2005. All Rights Reserved.
, of the lower
or DCR with
DS(ON) or
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Precision Multi-Phase Core Voltage Regulation
• Precision r
• Internal Shunt Regulator for 5V or 12V Biasing
• Microprocessor Voltage Identification Input
• Threshold-Sensitive Enable Function for synchronizing
• Overcurrent Protection
• Overvoltage Protection
• 2, 3, or 4 Phase Operation
• Greater Than 1MHz Operation (> 4MHz Ripple)
• Pb-free Available (RoHS Compliant)
• QFN Package Option
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over Life, Load, Line and
- Adjustable Reference-Voltage Offset
- Integrated Programmable Temperature Compensation
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Differential Current Sense
- Low-Cost, Lossless Current Sensing
- Dynamic VID™ technology
- 6-Bit VID Input
- 0.8375V to 1.600V in 12.5mV Steps
with driver POR
- No Additional External Components Needed
- OVP Pin to drive opitional Crowbar Device
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
- QFN Near Chip Scale Package Footprint; Improves
Temperature
Flat No Leads - Product Outline
PCB Efficiency, Thinner in Profile
All other trademarks mentioned are the property of their respective owners.
May 12, 2005
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
DS(ON)
or DCR Current Sensing
ISL6561
FN9098.5

Related parts for ISL6561CR

ISL6561CR Summary of contents

Page 1

... PCB Efficiency, Thinner in Profile CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 Dynamic VID™ trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002-2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL6561 May 12, 2005 FN9098 ...

Page 2

... PART NUMBER (°C) PACKAGE ISL6561CR 6x6 QFN ISL6561CR 6x6 QFN Tape and Reel ISL6561CRZ (Note 6x6 QFN (Pb-free) L40.6x6 ISL6561CRZ-T (Note 6x6 QFN Tape and Reel (Pb-free) ISL6561CRZA (Note 6x6 QFN (Pb-free) L40.6x6 ISL6561CRZA 6x6 QFN Tape and Reel (Note) (Pb-free) ISL6561IR ...

Page 3

... ISL6561CR Block Diagram VDIFF PGOOD RGND x1 VSEN OVP +200mV OFS OFFSET REF DAC VID4 VID3 DYNAMIC VID2 VID VID1 D/A VID0 VID12.5 COMP FB IDROOP TCOMP T 3 ISL6561 OVP VCC OVP R S POWER-ON LATCH RESET (POR) Q SOFT START CLOCK AND AND SAWTOOTH ...

Page 4

Typical Application - 4-Phase Buck Converter with Rds,on Sensing and External NTC FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL PGOOD ISL6561 OVP ISEN1+ VID4 ISEN1- VID3 PWM1 PWM2 VID2 ISEN2+ VID1 ISEN2- VID0 PWM3 ISEN3+ VID12.5 ...

Page 5

Typical Application - 4-Phase Buck Converter with r FB REF COMP IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL ISL6561 PGOOD OVP ISEN1+ VID4 ISEN1- VID3 PWM1 PWM2 VID2 ISEN2+ VID1 ISEN2- VID0 PWM3 ISEN3+ VID12.5 ISEN3- OFS PWM4 FS ...

Page 6

Typical Application - 4-Phase Buck Converter with DCR Sensing and External NTC FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL PGOOD ISL6561 OVP ISEN1+ VID4 ISEN1- VID3 PWM1 PWM2 VID2 ISEN2+ VID1 ISEN2- VID0 PWM3 ISEN3+ VID12.5 ...

Page 7

Typical Application - 4-Phase Buck Converter with DCR Sensing and Internal PTC FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL ISL6561 PGOOD OVP ISEN1+ VID4 ISEN1- VID3 PWM1 PWM2 VID2 ISEN2+ VID1 ISEN2- VID0 PWM3 ISEN3+ VID12.5 ...

Page 8

... Operating Conditions Supply Voltage, VCC (5V bias mode, Note +5V ±5% Ambient Temperature (ISL6561CR, ISL6561CRZ 0°C to 70°C Ambient Temperature (ISL6561IR, ISL6561IRZ -40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...

Page 9

Electrical Specifications Operating Conditions: VCC = 5V or ICC < 25mA (Note 3). Unless Otherwise Specified (Continued) PARAMETER PIN-ADJUSTABLE OFFSET Voltage at OFS pin OSCILLATOR Accuracy Adjustment Range Sawtooth Amplitude Max Duty Cycle ERROR AMPLIFIER Open-Loop Gain Open-Loop Bandwidth Slew ...

Page 10

... VID™ operations. PWM1, PWM2, PWM3, PWM4 - Pulse-width modulation outputs. Connect these pins to the PWM input pins of the Intersil driver IC. The number of active channels is determined by the state of PWM3 and PWM4. Tie PWM3 to VCC to configure for 2-phase operation. Tie PWM4 to VCC to configure for 3-phase operation. ...

Page 11

... ISL6561 controller helps simplifying the implementation by integrating vital functions and requiring minimal output components. The block diagrams on pages 2 and 3 provide top level views of multi-phase power conversion using the ISL65556ACB and ISL6561CR controllers. IL1 + IL2 + IL3, 7A/DIV IL3, 7A/DIV PWM3, 5V/DIV PWM2, 5V/DIV ...

Page 12

Reducing the inductor ripple current allows the designer to use fewer or less costly output capacitors – IN OUT OUT I = ----------------------------------------------------------- - Another ...

Page 13

... Intersil’s patented current-balance method is illustrated in Figure 6, with error correction for channel 1 represented. In the figure, the cycle average current ...

Page 14

... The output of the error amplifier, V COMP sawtooth waveform to generate the PWM signals. The PWM signals control the timing of the Intersil MOSFET drivers and regulate the converter output to the specified reference voltage. The internal and external circuitry that controls voltage regulation is illustrated in Figure 7. ...

Page 15

TABLE 1. VOLTAGE IDENTIFICATION (VID) CODES (Continued) VID4 VID3 VID2 VID1 VID0 ...

Page 16

... WITH ISL6561CR As evident in Figure 8, the OFSOUT pin must be connected to the REF pin for this current injection to function in ISL6561CR. The current flowing through R offset at the REF pin, which is ultimately duplicated at the output of the regulator. Once the desired output offset voltage has been determined, ...

Page 17

... To enable the controller, VCC must be greater than the POR threshold; the voltage on EN must be greater than 1.24V; for 10.7kΩ ISL6561CR, ENLL must be logic high; and VID cannot be equal to 111111 or 111110. When each of these conditions EN is true, the controller immediately begins the soft-start sequence. 1.40kΩ ...

Page 18

... VSEN falls below 0.6V with valid VCC or 1.5V otherwise. This causes the Intersil drivers to turn on the lower MOSFETs and pull the output voltage below a level that might cause damage to the load. The PWM outputs remain low until VDIFF falls to the programmed DAC level when they enter a high-impedance state ...

Page 19

... At the beginning of overcurrent shutdown, the controller places all PWM signals in a high-impedance state commanding the Intersil MOSFET driver ICs to turn off both upper and lower MOSFETs. The system remains in this state a period of 4096 switching cycles. If the controller is still enabled at the end of this wait period, it will attempt a soft start ...

Page 20

LOWER MOSFET POWER CALCULATION The calculation for heat dissipated in the lower MOSFET is simple, since virtually all of the heat loss in the lower MOSFET is due to current conducted through the channel resistance ( Equation 15, ...

Page 21

In Equation 22, make sure that ∆T is the desired temperature 2 rise above the ambient temperature, and ∆T temperature rise above the ambient temperature. While a single adjustment according to Equation 22 is usually sufficient, it may occasionally be ...

Page 22

COMP IDROOP VDIFF FIGURE 14. COMPENSATION CIRCUIT FOR ISL6561 BASED CONVERTER WITHOUT LOAD-LINE REGULATION The optional capacitor sometimes needed to bypass 2 noise away ...

Page 23

Neglecting the contribution of inductor current and regulator response, the output voltage initially deviates by an amount di ∆V ≈ ∆I ESL ---- - + ESR dt The ...

Page 24

L, 0 0. 0.2 0.4 0.6 DUTY CYCLE (V O FIGURE 16. NORMALIZED INPUT-CAPACITOR RMS CURRENT vs DUTY CYCLE FOR 2-PHASE CONVERTER ...

Page 25

... Align the output inductors and MOSFETs such that space between the components is minimized while creating the PHASE plane. Place the Intersil MOSFET driver IC as close as possible to the MOSFETs they control to reduce the parasitic impedances due to trace length between critical driver input and output signals ...

Page 26

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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