LT3582EUD-12#TRPBF Linear Technology, LT3582EUD-12#TRPBF Datasheet - Page 20

IC DC/DC CONV +/-12V 16-QFN

LT3582EUD-12#TRPBF

Manufacturer Part Number
LT3582EUD-12#TRPBF
Description
IC DC/DC CONV +/-12V 16-QFN
Manufacturer
Linear Technology
Type
Step-Up (Boost), Invertingr
Datasheet

Specifications of LT3582EUD-12#TRPBF

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
2
Voltage - Output
±12V
Current - Output
350mA, 600mA
Voltage - Input
2.55 ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-WQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Frequency - Switching
-

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Manufacturer
Quantity
Price
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Part Number:
LT3582EUD-12#TRPBFLT3582EUD-12
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LT
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10 000
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Part Number:
LT3582EUD-12#TRPBFLT3582EUD-12#PBF
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LT
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LT3582/LT3582-5/LT3582-12
APPLICATIONS INFORMATION
Output Disconnect Operating Limits
The LT3582 series has a PMOS output disconnect switch
connected between CAPP and V
operation, the switch is closed and current is internally
limited to about 155mA (see Figure 9). Make sure that the
output load current doesn’t exceed the PMOS current limit.
Exceeding the current limit causes a signifi cant rise in PMOS
power consumption which may damage the device.
During shutdown, the PMOS switch is open and CAPP is
isolated from V
In most cases this allows V
However, when the Boost inductor input exceeds 5.5V, the
CAPP-V
fl ow through the PMOS switch. In addition, applying CAPP-
V
internal protection circuitry which turns the PMOS “on”
(see Figure 10). If the current is not limited, this can lead
to a sharp increase in the PMOS power consumption and
may damage the device. If this situation cannot be avoided,
limit PMOS power consumption to less than 1/3 Watt (about
50mA at 7V) to avoid damaging the device. Refer to the
Absolute Maximum Ratings table for maximum limits on
CAPP-V
20
OUTP
Figure 9. PMOS Current vs Voltage During Normal Operation
voltages in excess of 5.7V(typical) may activate
OUTP
OUTP
180
160
140
120
100
80
60
40
20
0
voltage may exceed 5V allowing some current
voltages and currents.
0
OUTP
100
up to a voltage difference of 5-5.5V.
CAPP-V
200
OUTP
OUTP
300
(mV)
to discharge to ground.
OUTP
400
3582512 F10
. During normal
500
Improving Boost Converter Effi ciency
The effi ciency of the Boost converter can be improved by
shorting the CAPP pin to the V
power loss in the PMOS disconnect circuit is then made
negligible. In most applications, the associated CAPP pin
capacitor can be removed and the larger V
can adequately fi lter the output voltage.
Figure 10. PMOS Current vs Voltage During Shutdown
I
CAPP-VOUTP
20μA/DIV
13
4
3
2
8
Figure 11. Improved Effi ciency
SWN
SWN
GND
V
SHDN
OUTN
RAMPP
V
CAPP-VOUTP
LT3582
7
RAMPN
OUTP
6
1V/DIV
V
CAPP
CAPP
SWP
OUTP
SDA
SCL
V
V
CA
PP
IN
pin (see Figure 11). The
3582512 F12
12
5
11
10
9
14
15
16
1
3582512 F11
OUTP
C1
capacitor
I
3582512fb
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