IC CTRLR PWM 1PHASE SO-8

L6726A

Manufacturer Part NumberL6726A
DescriptionIC CTRLR PWM 1PHASE SO-8
ManufacturerSTMicroelectronics
TypeStep-Down (Buck)
L6726A datasheet
 


Specifications of L6726A

Internal Switch(s)NoSynchronous RectifierNo
Number Of Outputs1Voltage - OutputAdj to 0.8V
Frequency - Switching270kHzVoltage - Input1.5 ~ 12 V
Operating Temperature-20°C ~ 85°CMounting TypeSurface Mount
Package / Case8-SOIC (3.9mm Width)Output Current1.5 A
Input Voltage4.1 V to 13.2 VOperating Temperature Range- 40 C to + 150 C
Mounting StyleSMD/SMTFor Use With497-9046 - BOARD EVAL BASED ON L6726A497-6364 - BOARD DEMO FOR TS4995EIJT497-6259 - BOARD EVAL 1PH STPDN CONV L6726A
Lead Free Status / RoHS StatusLead free / RoHS CompliantCurrent - Output-
Power - Output-  
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L6726A
2
Pins description and connection diagrams
Figure 3.
Pins connection (top view)
2.1
Pin descriptions
Table 2.
Pins descriptions
Pin n
Name
1
BOOT
2
UGATE
3
GND
4
LGATE / OC
5
VCC
6
FB
7
COMP / DIS
8
PHASE
Pins description and connection diagrams
BOOT
1
UGATE
2
L6726A
GND
3
LGATE / OC
4
HS driver supply.
Connect through a capacitor (100 nF) to the floating node (LS-drain) pin
and provide necessary bootstrap diode from VCC.
HS driver output. Connect to HS MOSFET gate.
All internal references, logic and drivers are connected to this pin.
Connect to the PCB ground plane.
LGATE. LS driver output. Connect to LS MOSFET gate.
OC. Over current threshold set. During a short period of time following VCC
rising over UVLO threshold, a 10μA current is sourced from this pin.
Connect to GND with an R
OCSET
Threshold. The resulting voltage at this pin is sampled and held internally
as the OC set point. Maximum programmable OC threshold is 0.55 V. A
voltage greater than 0.75V (max) activates an internal clamp and causes
OC threshold to be set at 400 mV. R
default threshold.
Device and LS driver power supply.
Operative range from 4.1 V to 13.2 V. Filter with at least 1μF MLCC to GND.
Error amplifier inverting input.
Connect with a resistor R
to the output regulated voltage. Additional
FB
resistor R
to GND may be used to regulate voltages higher than the
OS
reference.
COMP. Error amplifier output. Connect with an R
compensate the device control loop in conjunction to the FB pin.
During the soft-start phase, a 10 μA current is sourced from this pin so the
compensation capacitors also act to program the SS time.
DIS. The device can be disabled by pulling this pin lower than 0.4 V (min).
Setting free the pin, the device enables again.
HS driver return path, current-reading and adaptive-dead-time monitor.
Connect to the LS drain to sense R
This pin is also used by the adaptive-dead-time control circuitry to monitor
when HS MOSFET is OFF.
Doc ID 12754 Rev 4
PHASE
8
COMP / DIS
7
FB
6
VCC
5
Function
resistor greater than 5kΩ to program OC
not connected sets the 400 mV
OCSET
- C
// C
to GND to
F
F
P
drop to measure the output current.
dsON
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