L6727 STMicroelectronics, L6727 Datasheet - Page 16

• Manufacturer Part Number: L6727
• Description: IC PWM CTLR SGL PHASE SO-8
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of L6727

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: Adj to 0.8V
• Frequency - Switching: 300kHz
• Voltage - Input: 1.5 ~ 12 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Output Current: 1.5 A
• Input Voltage: - 0.3 V to + 15 V
• Switching Frequency: 300 KHz
• Operating Temperature Range: - 40 C to + 150 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 80 %
• For Use With: 497-8266 - BOARD EVAL BASED ON L6727497-6258 - BOARD EVAL 1PH STPDWN CONV L6727
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Application details
16/34
Compensation goal is to close the control loop assuring high DC regulation accuracy, good
dynamic performances and stability. To achieve this, the overall loop needs high DC gain,
high bandwidth and good phase margin.
High DC gain is achieved giving an integrator shape to compensation network transfer
function. Loop bandwidth (F
stability, it should not exceed F
has to cross 0dB axis with -20 dB/decade slope.
As an example,
Figure 7.
●
●
Open loop converter singularities:
a)
b)
Compensation Network singularities frequencies:
a)
b)
c)
d)
F
F
F
F
F
F
ESR
Example of type III compensation.
LC
Z1
Z2
P1
P2
compensation
converter gain
loop gain
open loop
EA gain
=
Figure 7
closed
=
=
open loop
=
=
=
------------------------------
2π R
gain
--------------------------------- -
2π L C
---------------------------------------------------- -
2π
------------------------------------------------- -
2π R
------------------------------ -
2π R
------------------------------------------- -
2π C
⋅
Gain
[dB]
0dB
⋅
⋅
⋅
⋅
(
1
R
1
F
1
⋅
F
S
FB
shows an asymptotic bode plot of a type III compensation.
OUT
⋅
⋅
⋅
C
OUT
1
1
⎛
⎝
C
1
+
F
-------------------- -
C
0dB
C
S
⋅
R
F
F
ESR
SW
Doc ID 12933 Rev 4
+
S
⋅
) can be fixed choosing the right R
) C
C
C
⋅
/2π. To achieve a good phase margin, the control loop gain
P
P
⎞
⎠
F
Z1
S
F
F
LC
Z2
F
F
ESR
P1
F
0dB
F
P2
20log (R
F
/R
F
20log (V
/R
FB
Log (Freq)
)
FB
IN
ratio, however, for
/ΔV
OSC
)
L6727