IC DUAL NONSYNC CONV 3A 14HTSSOP

TPS54386PWPG4

Manufacturer Part NumberTPS54386PWPG4
DescriptionIC DUAL NONSYNC CONV 3A 14HTSSOP
ManufacturerTexas Instruments
TypeStep-Down (Buck)
TPS54386PWPG4 datasheet
 


Specifications of TPS54386PWPG4

Internal Switch(s)YesSynchronous RectifierNo
Number Of Outputs2Voltage - Output0.8 ~ 25.2 V
Current - Output3AFrequency - Switching600kHz
Voltage - Input4.5 ~ 28 VOperating Temperature-40°C ~ 125°C
Mounting TypeSurface MountPackage / Case14-TSSOP Exposed Pad, 14-eTSSOP 14-HTSSOP
Power - Output1.6WMounting StyleSMD/SMT
For Use WithTPS54386EVM - TPS54386EVMTPS54383EVM - TPS54383EVMLead Free Status / RoHS StatusLead free / RoHS Compliant
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3-A DUAL NON-SYNCHRONOUS CONVERTER WITH INTEGRATED HIGH-SIDE MOSFET
FEATURES
1
4.5-V to 28-V Input Range
23
Output Voltage Range 0.8 V to 90% of Input
Voltage
Output Current Up to 3 A
Two Fixed Switching Frequency Versions:
– TPS54383: 300 kHz
– TPS54386: 600 kHz
Three Selectable Levels of Overcurrent
Protection (Output 2)
0.8-V 1.5% Voltage Reference
2.1-ms Internal Soft Start
Dual PWM Outputs 180 Out-of-Phase
Ratiometric or Sequential Startup Modes
Selectable by a Single Pin
85-mΩ Internal High-Side MOSFETs
Current Mode Control
Internal Compensation (See Page 16)
Pulse-by-Pulse Overcurrent Protection
Thermal Shutdown Protection at +148 C
14-Pin PowerPAD™ HTSSOP package
APPLICATIONS
Set Top Box
Digital TV
Power for DSP
Consumer Electronics
OUTPUT1
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
2
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007
CONTENTS
Device Ratings
Electrical Characteristics
Device Information
Application Information
Design Examples
Additional References
DESCRIPTION
The TPS54383 and TPS54386 are dual output,
non-synchronous
buck
supporting 3-A output applications that operate from a
4.5-V to 28-V input supply voltage, and require output
voltages between 0.8 V and 90% of the input voltage.
With an internally-determined operating frequency,
soft start time, and control loop compensation, these
converters provide many features with a minimum of
external
components.
protection is set at 4.5 A, while Channel 2 overcurrent
protection level is selected by connecting a pin to
ground, to BP, or left floating. The setting levels are
used to allow for scaling of external components for
applications that do not need the full load capability of
both outputs.
The outputs may be enabled independently, or may
be configured to allow either ratiometric or sequential
startup sequencing. Additionally, the two outputs may
be powered from different sources.
V
IN
TPS54383
1
PVDD1
PVDD2
14
2
BOOT1
BOOT2
13
3
SW1
SW2
12
4
GND
BP
11
5
EN1
SEQ
10
6
EN2
ILIM2
9
7
FB1
FB2
8
GND
Copyright © 2007, Texas Instruments Incorporated
TPS54383, , TPS54386
2
3
9
12
32
44
converters
capable
of
Channel
1
overcurrent
OUTPUT2
UDG-07123

TPS54386PWPG4 Summary of contents

  • Page 1

    ... OUTPUT1 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. 2 All other trademarks are the property of their respective owners. ...

  • Page 2

    ... Tube 90 Tape and Reel 2000 Tube 90 Tape and Reel 2000 VALUE UNIT – – 6.5 –0.3 to 6.5 –0 –55 to +165 –40 to +150 C +260 MIN MAX UNIT 4 –40 +125 C MIN UNIT 2k 1.5k V 250 POWER RATING (W) 1.0 Copyright © 2007, Texas Instruments Incorporated ...

  • Page 3

    ... ON2(oc) (1) Ensured by design. Not production tested. (2) When both outputs are started simultaneously, a 20-mA current source charges the BP capacitor. Faster times are possible with a lower BP capacitor value. More information can be found in the Copyright © 2007, Texas Instruments Incorporated TEST CONDITIONS EN1 ...

  • Page 4

    ... C < T < +125 PVDD2 (4) I peak current > SWx TPS54383 f = 300 kHz SW TPS54386 f = 600 kHz SW Outputs OFF Product Folder Link(s): TPS54383 TPS54386 www.ti.com MIN TYP MAX UNIT 18 Ω 85 mΩ 85 165 100 200 148 C 20 Copyright © 2007, Texas Instruments Incorporated ...

  • Page 5

    ... Junction Temperature J Figure 1. UNDERVOLTAGE LOCKOUT THRESHOLD vs JUNCTION TEMPERATURE 4.2 4.1 UVLO(On) 4.0 3.9 UVLO(Off) 3.8 3.7 3.6 -50 - Junction Temperature J Figure 3. Copyright © 2007, Texas Instruments Incorporated TYPICAL CHARACTERISTICS 140 120 100 100 125 -50 -25 - ° C 1.25 EN(Off) 1.23 1.21 EN(On) 1.19 1.17 1 ...

  • Page 6

    ... 100 125 -50 - ° Product Folder Link(s): TPS54383 TPS54386 www.ti.com vs JUNCTION TEMPERATURE 5. 100 125 T - Junction Temperature - ° Figure 6. FEEDBACK BIAS CURRENT vs JUNCTION TEMPERATURE 100 125 T Junction Temperature ° J Figure 8. Copyright © 2007, Texas Instruments Incorporated ...

  • Page 7

    ... OVERCURRENT LIMIT (CH2 MID LEVEL) vs JUNCTION TEMPERATURE 3.4 3.2 3.0 2 PVDDx V PVDDx 2.6 -50 - Junction Temperature - J Figure 11. Copyright © 2007, Texas Instruments Incorporated OVERCURRENT LIMIT (CH1, CH2 HIGH LEVEL) 4.8 4.6 4 PVDD 4.2 4.0 75 100 125 -50 -25 - ° C OVERCURRENT LIMIT (CH2 LOW LEVEL) 1 PVDDx 1 ...

  • Page 8

    ... OVERCURRENT LIMIT vs SUPPLY VOLTAGE OCL = 3.0 A OCL = 4.5 A OCL = 1 Supply Voltage - V DD Figure 15. Product Folder Link(s): TPS54383 TPS54386 www.ti.com vs LOAD CURRENT T (°C) A – –40° 0° 85°C A 0.4 0.6 0.8 1.0 1.2 1 Load Current - A L Figure 14 Copyright © 2007, Texas Instruments Incorporated ...

  • Page 9

    ... Output 2 high-side MOSFET. This pin should be locally bypassed to PVDD2 14 I GND with a low ESR ceramic capacitor of 10 greater. The UVLO function monitors PVDD2 and enables the device when PVDD2 is greater than 4.1 V. Copyright © 2007, Texas Instruments Incorporated DEVICE INFORMATION HTSSOP (PWP) (Top View) PVDD1 1 ...

  • Page 10

    ... See Thermal Pad - - This pad must be tied externally to a ground plane and the GND pin. 10 Submit Documentation Feedback table. SW Node Ringing for further information. SW Node Ringing for further information. Product Folder Link(s): TPS54383 TPS54386 www.ti.com Copyright © 2007, Texas Instruments Incorporated ...

  • Page 11

    ... Level Shift f DC(ofst) DRAIN2 GND 4 FB2 8 + 0.8 V REF Soft Start SD2 150 kW BP Level ILIM2 9 Select 150 kW Copyright © 2007, Texas Instruments Incorporated BP Current Comparator + + f(I ) DRAIN1 Overcurrent Comp COMP f(I ) f(I ) SLOPE1 MAX1 C COMP TSD 1.2 MHz Divide Oscilator by 2/4 ...

  • Page 12

    ... The total standby current from both PVDD pins is approximately 12-V input supply. 12 Submit Documentation Feedback APPLICATION INFORMATION DESIGN HINT Feedback Loop and L-C Filter NOTE: Electrical Characteristics for minimum and maximum values. Dual Supply Operation section.) Product Folder Link(s): TPS54383 TPS54386 www.ti.com Copyright © 2007, Texas Instruments Incorporated ...

  • Page 13

    ... If ENx is allowed to go high after the Outputx has been in regulation, the upper MOSFET shuts off, and the output decays at a rate determined by the output capacitor and the load. The internal pulldown MOSFET remains in the OFF state. (See the Bootstrap for N-Channel MOSFET Copyright © 2007, Texas Instruments Incorporated farads PVDD2 6 mA ...

  • Page 14

    ... V > enable threshold voltage EN1 Active. EN1 and EN2 must be tied together for Ratio-metric startup. 5-V VOUT1 (2 V/div) 3.3-V VOUT2 (2 V/div Time - 1 ms/div Figure 19. SEQ Pin Tied to GND Copyright © 2007, Texas Instruments Incorporated < ...

  • Page 15

    ... Output Overload Protection section.) There is no pulse skipping if a current limit pulse is not detected. If the rate of rise of the input voltage (PVDDx) is such that the input voltage is too low Copyright © 2007, Texas Instruments Incorporated NOTE: Enable and Timed Turn On of the ...

  • Page 16

    ... Maximum Output Capacitance Figure 21). Assuming the value of the upper voltage TPS5438x 1 PVDD1 PVDD2 2 BOOT1 BOOT2 3 SW1 4 GND R1 5 EN1 6 EN2 7 FB1 R2 DESIGN HINT Product Folder Link(s): TPS54383 TPS54386 www.ti.com for related 14 13 SW2 SEQ 10 ILIM2 9 FB2 8 UDG-07011 Copyright © 2007, Texas Instruments Incorporated (2) ...

  • Page 17

    ... To find the appropriate L and C filter combination, the Output-to-Vc signal path plots (see other design criterial to aid in finding the combinations that best results in a stable feedback loop. Copyright © 2007, Texas Instruments Incorporated NOTE: I ...

  • Page 18

    ... Network 270 100 Duty Cycle % Gain Phase 225 180 135 -45 -90 -20 100 100 Figure 25. TPS54383 at 400-mApp Ripple Current Product Folder Link(s): TPS54383 TPS54386 www.ti.com VOUT Filter GAIN AND PHASE vs FREQUENCY 270 225 180 135 -45 - 100 Copyright © 2007, Texas Instruments Incorporated ...

  • Page 19

    ... Instead, the TPS5438x simply shuts down and attempts a restart as if the output were short-circuited to ground. The maximum output capacitance (including bypass capacitance distributed at the load) is given by Equation 3: Copyright © 2007, Texas Instruments Incorporated 100 270 85 225 70 ...

  • Page 20

    ... Submit Documentation Feedback ´ REF + ( ´ V ´ TPS5438x 1 PVDD1 2 BOOT1 3 SW1 GND 5 EN1 C1 6 EN2 R2 7 FB1 R3 NOTE: Product Folder Link(s): TPS54383 TPS54386 www.ti.com 1 ) LOAD (ref.Figure 30 ) are added to PVDD2 14 BOOT2 13 SW2 SEQ 10 ILIM2 9 FB2 8 UDG-07013 Copyright © 2007, Texas Instruments Incorporated (3) Soft ...

  • Page 21

    ... This frequency should be placed ZERO(desired) between 20 kHz and 60 kHz to ensure good loop stability. Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS54383 TPS54386 TPS54383, , TPS54386 SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007 ...

  • Page 22

    ... R2 R3 è where f is the unity gain crossover frequency, (approximately 50 kHz for most designs following these guidelines Submit Documentation Feedback Equation 5. ) ö ÷ ) ÷ ø Product Folder Link(s): TPS54383 TPS54386 www.ti.com (5) (6) Equation 7. Keep (7) (8) (9) Copyright © 2007, Texas Instruments Incorporated ...

  • Page 23

    ... ESR ´ p ´ ´ ´ RES The resulting loop gain and phase are shown in with a phase margin of 60 degrees -10 -20 100 Copyright © 2007, Texas Instruments Incorporated 10. = 30% Equation 11. 1 0.3 10.9 H ´ ´ 600000 3.14 6000 ( ) ´ ´ ´ ...

  • Page 24

    ... A by-product of pulse skipping is an increase in the peak-to-peak output ripple voltage. 24 Submit Documentation Feedback DESIGN HINT NOTE: will be the same as quiescent SDN Product Folder Link(s): TPS54383 TPS54386 www.ti.com Equation 14. (14) Copyright © 2007, Texas Instruments Incorporated ...

  • Page 25

    ... A resistor with a value between 1Ω and 3Ω may be placed in series with the bootstrap capacitor to reduce ringing on the SW node. Placeholders for these components should be placed on the initial prototype PCBs in case they are needed. Copyright © 2007, Texas Instruments Incorporated SW Waveform V OUT Ripple ...

  • Page 26

    ... DIODE 26 Submit Documentation Feedback Output 2 OCP Threshold for Output 2 BP 4.5 A nominal setting (floating) 3.0 A nominal setting GND 1.5 A nominal setting DESIGN HINT DESIGN HINT Equation 15. Product Folder Link(s): TPS54383 TPS54386 www.ti.com (15) Copyright © 2007, Texas Instruments Incorporated ...

  • Page 27

    ... Cascading Supply Operation It is possible to source PVDD1 from Output 2 as depicted in preferred if the input voltage is high, relative to the voltage on Output 1. OUTPUT1 Figure 34. Schematic Showing Cascading PVDD1 from Output 2 Copyright © 2007, Texas Instruments Incorporated Operating Near Maximum Duty Cycle DESIGN HINT Figure 34 and ...

  • Page 28

    ... MOSFET is composed of conduction losses and output (switching) losses incurred while driving the external rectifier diode. To find the conduction loss, first find the RMS current through the upper switch MOSFET. 28 Submit Documentation Feedback T - Time Product Folder Link(s): TPS54383 TPS54386 www.ti.com http://www.power.ti.com Copyright © 2007, Texas Instruments Incorporated ...

  • Page 29

    ... Note that these curves assume that the PowerPAD is properly soldered to the recommended thermal pad. (See the References section for further information.) Copyright © 2007, Texas Instruments Incorporated 2 ö æ ö ...

  • Page 30

    ... Submit Documentation Feedback POWER DISSIPATION vs AMBIENT TEMPERATURE LFM = 250 LFM = 500 LFM = 0 LFM = 150 LFM 0 150 250 500 100 T - Ambient Temperature - °C A Figure 36. Power Derating Curves section.) Product Folder Link(s): TPS54383 TPS54386 www.ti.com 120 140 Figure 37 Copyright © 2007, Texas Instruments Incorporated and ...

  • Page 31

    ... Locate the BP bypass capacitor very close to the IC; a minimal loop area is recommended. Locate the output ceramic capacitor close to the inductor output terminal between the inductor and any electrolytic capacitors, if used. VIN GND Figure 37. Top Layer Copper Layout and Component Placement Copyright © 2007, Texas Instruments Incorporated L2 C14 R8 C17 D2 ...

  • Page 32

    ... TPS54383, , TPS54386 SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007 32 Submit Documentation Feedback Figure 38. Bottom Layer Copper Layout Product Folder Link(s): TPS54383 TPS54386 www.ti.com Copyright © 2007, Texas Instruments Incorporated ...

  • Page 33

    ... OUT Δ OUT from load transient Transient response settling time SYSTEM CHARACTERISTICS f Switching frequency SW Full load efficiency Operating temperature T J range + + Copyright © 2007, Texas Instruments Incorporated DESIGN EXAMPLES = max OUT = 0 A OUT = nom OUT = nom OUT = max OUT = OUT OUT1 = ...

  • Page 34

    ... A schottky diode is selected as a rectifier diode for its low forward voltage drop. Allowing 20% over VIN for ringing on the switch node, the required minimum reverse break-down voltage of the rectifier diode is: 34 Submit Documentation Feedback ´ Equation 25 Product Folder Link(s): TPS54383 TPS54386 www.ti.com (21) (22) (23) (24) (25) (26) Copyright © 2007, Texas Instruments Incorporated ...

  • Page 35

    ... The primary feedback divider resistors (R2, R9) from VOUT to FB should be between 10 kΩ and 50 kΩ to maintain a balance between power dissipation and noise sensitivity. For this design, 20 kΩ is selected. The lower resistors, R4 and R7 are found using the following equations. Copyright © 2007, Texas Instruments Incorporated Equation 28. ...

  • Page 36

    ... The TPS54383 datasheet recommends a minimum 10- F ceramic input capacitor on each PVDD pin. These capacitor must be capable of handling the RMS ripple current of the converter. The RMS current in the input capacitors is estimated by Equation 36 Submit Documentation Feedback 38. Product Folder Link(s): TPS54383 TPS54386 www.ti.com (32) (33) (34) (35) (36) (37) Copyright © 2007, Texas Instruments Incorporated ...

  • Page 37

    ... REG max ( ) With no external load =0) the regulator power dissipation is 66 mW. BP Total power dissipation in the device is the sum of conduction and switching for both channels plus regulator losses. Copyright © 2007, Texas Instruments Incorporated 2 ö æ ö OUTPUTx ÷ ç ÷ ...

  • Page 38

    ... OUT 9.6 12.0 10 13.2 0 2.0 2.5 3.0 0 Figure 42. 3.3-V Output Efficiency vs. Load Current Product Folder Link(s): TPS54383 TPS54386 www.ti.com = 13 12 3.3 V OUT V (V) IN 9.6 12.0 13.2 0.5 1.0 1.5 2.0 2 Load Current - A LOAD Copyright © 2007, Texas Instruments Incorporated 3.0 ...

  • Page 39

    ... V = 13.2 V 0.997 IN 0.996 0.995 0 0.5 1.0 1 Load Current - A OUT Figure 43. 5.0-V Output Voltage vs. Load Current -20 -40 -60 - Copyright © 2007, Texas Instruments Incorporated 1.005 1.004 1.003 = 9 1.002 V 1.001 1.000 0.999 V = 5.0 V OUT 0.998 V (V) 0.997 IN 9.6 12.0 0.996 13.2 0.995 2.0 2 ...

  • Page 40

    ... EEEFC1E101P Panasonic C3216X5R1E106M TDK Std Std Std Std Std Std EEEFC1A101P Panasonic C2012X5R0J106M TDK Std Std Std Std MBRS330T3 On Semi MSS1278-153ML Coilcraft Std Std Std Std Std Std Std Std Std Std Std Std TPS54383PWP TI Copyright © 2007, Texas Instruments Incorporated ...

  • Page 41

    ... Peak to Peak ripple voltage due to ideal capacitor (ESR = 0 ) RIPPLE(cap) V Maximum allowable peak to peak output ripple voltage RIPPLE(tot) Copyright © 2007, Texas Instruments Incorporated Table 4. Definition of Symbols Product Folder Link(s): TPS54383 TPS54386 TPS54383, , TPS54386 SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007 ...

  • Page 42

    ... T − Time − div Figure 47. Switch Node Ringing Without Snubber and Boost Resistor 42 Submit Documentation Feedback OUT V OUT (5 V/div) Figure 48. Switch Node Ringeing With Snubber and Product Folder Link(s): TPS54383 TPS54386 www.ti.com + T − Time − div Boost Resistor Copyright © 2007, Texas Instruments Incorporated ...

  • Page 43

    ... Copyright © 2007, Texas Instruments Incorporated OUT OUT 0.5 1.0 1.5 2 Load Current - A OUT Figure 49. Efficiency vs. Load Current Product Folder Link(s): TPS54383 TPS54386 TPS54383, , TPS54386 SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007 = 24 V (V) OUT 5 12 2.5 3.0 Submit Documentation Feedback ...

  • Page 44

    ... V OUT - -40 V (V) OUT -60 1.2 3.3 - 2.0 2.5 3.0 Product Folder Link(s): TPS54383 TPS54386 www.ti.com 180 = 1.2 V 135 -45 -90 Gain Phase -135 WIth Lead Without Lead -180 10 k 100 k 300 Frequency -Hz Figure 52. Example 3 Loop Response Copyright © 2007, Texas Instruments Incorporated ...

  • Page 45

    ... Designing Stable Control Loops. SEM 1400, 2001 Seminar Series Package Outline and Recommended PCB Footprint The following pages outline the mechanical dimensions of the 14-Pin PWP package and provide recommendations for PCB layout. Copyright © 2007, Texas Instruments Incorporated ADDITIONAL REFERENCES DESCRIPTION 5-V Input, 1.6-A Non-Synchronous Buck Converter 2-A Dual Non-Synchronous Converter with Integrated High-Side MOSFET Table 6 ...

  • Page 46

    ... ACTIVE TPS54383PWPG4 ACTIVE TPS54383PWPR ACTIVE TPS54383PWPRG4 ACTIVE TPS54386PWP ACTIVE TPS54386PWPG4 ACTIVE TPS54386PWPR ACTIVE TPS54386PWPRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

  • Page 47

    TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing TPS54383PWPR HTSSOP PWP TPS54386PWPR HTSSOP PWP PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 14 2000 330.0 12.4 6.9 14 ...

  • Page 48

    Device Package Type TPS54383PWPR HTSSOP TPS54386PWPR HTSSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) PWP 14 2000 PWP 14 2000 Pack Materials-Page 2 25-Sep-2009 Width (mm) Height (mm) 346.0 346.0 29.0 346.0 346.0 ...

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    ... ACTIVE TPS54383PWPG4 ACTIVE TPS54383PWPR ACTIVE TPS54383PWPRG4 ACTIVE TPS54386PWP ACTIVE TPS54386PWPG4 ACTIVE TPS54386PWPR ACTIVE TPS54386PWPRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

  • Page 53

    TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing TPS54383PWPR HTSSOP PWP TPS54386PWPR HTSSOP PWP PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 14 2000 330.0 12.4 6.9 14 ...

  • Page 54

    Device Package Type TPS54383PWPR HTSSOP TPS54386PWPR HTSSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) PWP 14 2000 PWP 14 2000 Pack Materials-Page 2 25-Sep-2009 Width (mm) Height (mm) 346.0 346.0 29.0 346.0 346.0 ...

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    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...