KS8993M Micrel Inc, KS8993M Datasheet - Page 71

• Manufacturer Part Number: KS8993M
• Description: IC SWITCH 10/100 3PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KS8993M

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Supply Voltage (min): 1.71/3.135V
• Power Dissipation: 800mW
• Supply Current: 0.1/0.19A
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1013 - BOARD EVAL EXPERIMENT KS8993M
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant

Offset
0x1B
0x1C
0x1D
0x1E
0x1F
“All Port Dropped Packet” MIB counters are read using indirect memory access. The address offsets for these
counters are shown in the following table:
Micrel, Inc.
April 2005
Bit
30-16
15-0
Examples:
1. MIB Counter Read (Read port 1 “Rx64Octets” Counter)
2. MIB Counter Read (Read Port 2 “Rx64Octets” Counter)
Counter Name
TxDeferred
TxTotalCollision
TxExcessiveCollision
TxSingleCollision
TxMultipleCollision
Then
Offset
0x100
0x101
0x102
0x103
0x104
0x105
Write to reg. 110 with 0x1c (read MIB counters selected)
Write to reg. 111 with 0x0e (trigger the read operation)
Read reg. 117 (counter value 30-24) // If bit 30 = 0, restart (reread) from this register
Read reg. 118 (counter value 23-16)
Read reg. 119 (counter value 15-8)
Read reg. 120 (counter value 7-0)
Write to reg. 110 with 0x1c (read MIB counter selected)
Write to reg. 111 with 0x2e (trigger the read operation)
Name
Reserved
Counter values
Table 19. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets
Table 17. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets
Counter Name
Port1 TX Drop Packets
Port2 TX Drop Packets
Port3 TX Drop Packets
Port1 RX Drop Packets
Port2 RX Drop Packets
Port3 RX Drop Packets
Table 18. Format of “All Port Dropped Packet” MIB Counters
R/W
N/A
RO
Description
Tx packets by a port for which the 1st Tx attempt is delayed due to the busy
medium
Tx total collision, half duplex only
A count of frames for which Tx fails due to excessive collisions
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
Description
Reserved
Counter value
Description
TX packets dropped due to lack of resources
TX packets dropped due to lack of resources
TX packets dropped due to lack of resources
RX packets dropped due to lack of resources
RX packets dropped due to lack of resources
RX packets dropped due to lack of resources
71
Default
N/A
0
KS8993M/ML/MI
M9999-041205