SI8462AB-A-IS1 Silicon Laboratories Inc, SI8462AB-A-IS1 Datasheet
SI8462AB-A-IS1
Specifications of SI8462AB-A-IS1
Related parts for SI8462AB-A-IS1
SI8462AB-A-IS1 Summary of contents
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... IEC 60950-1, 61010-1 (reinforced insulation ) Description Silicon Lab's family of ultra-low-power digital isolators are CMOS devices offering substantial data rate, propagation delay, power, size, reliability, and external BOM advantages when compared to legacy isolation technologies. The operating parameters of these products remain stable across wide temperature ranges throughout their service life ...
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Si8460/61/62/63 2 Rev. 1.3 ...
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T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Si8460/61/62/63 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Operating Temperature* Supply Voltage *Note: The maximum ambient temperature is dependent on data frequency, output loading, number of operating channels, and supply voltage. Table 2. Absolute Maximum Ratings Parameter ...
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Table 3. Electrical Characteristics ( V±10 V±10%, T DD1 DD2 A Parameter Symbol High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current 1 Output Impedance ...
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Si8460/61/62/63 Table 3. Electrical Characteristics (Continued V±10 V±10%, T DD1 DD2 A Parameter Symbol 1 Mbps Supply Current (All inputs = 500 kHz square wave all outputs) Si8460Ax, Bx ...
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Table 3. Electrical Characteristics (Continued V±10 V±10%, T DD1 DD2 A Parameter Symbol 100 Mbps Supply Current (All inputs = 50 MHz square wave all outputs) Si8460Bx V DD1 ...
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Si8460/61/62/63 Table 3. Electrical Characteristics (Continued V±10 V±10%, T DD1 DD2 A Parameter Symbol All Models Output Rise Time Output Fall Time Common Mode Transient CMTI Immunity 3 Start-up Time Notes: 1. The nominal ...
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Table 4. Electrical Characteristics (V = 3.3 V±10 3.3 V±10%, T DD1 DD2 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current 1 Output Impedance DC Supply ...
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Si8460/61/62/63 Table 4. Electrical Characteristics (Continued 3.3 V±10 3.3 V±10%, T DD1 DD2 Parameter 1 Mbps Supply Current (All inputs = 500 kHz square wave all outputs) Si8460Ax DD1 ...
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Table 4. Electrical Characteristics (Continued 3.3 V±10 3.3 V±10%, T DD1 DD2 Parameter 100 Mbps Supply Current (All inputs = 50 MHz square wave all outputs) Si8460Bx V DD1 V DD2 ...
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Si8460/61/62/63 Table 4. Electrical Characteristics (Continued 3.3 V±10 3.3 V±10%, T DD1 DD2 Parameter All Models Output Rise Time Output Fall Time Common Mode Transient Immunity at Logic Low Output 3 Start-up Time Notes: 1. The ...
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Table 5. Electrical Characteristics ( –40 to 125 ºC; applies to narrow-body SOIC package) DD1 DD2 A Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low ...
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Si8460/61/62/63 Table 5. Electrical Characteristics ( –40 to 125 ºC; applies to narrow-body SOIC package) DD1 DD2 A Parameter 1 Mbps Supply Current (All inputs = 500 kHz square wave, CI ...
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Table 5. Electrical Characteristics ( –40 to 125 ºC; applies to narrow-body SOIC package) DD1 DD2 A Parameter 100 Mbps Supply Current (All inputs = 50 MHz square wave ...
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Si8460/61/62/63 Table 5. Electrical Characteristics ( –40 to 125 ºC; applies to narrow-body SOIC package) DD1 DD2 A Parameter All Models Output Rise Time Output Fall Time Common Mode Transient Immunity ...
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Table 7. Insulation and Safety-Related Specifications Parameter 1 Nominal Air Gap (Clearance) Nominal External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Proof Tracking Index) Erosion Depth 2 Resistance (Input-Output) 2 Capacitance (Input-Output) 3 Input Capacitance Notes: 1. The ...
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Si8460/61/62/63 Table 9. IEC 60747-5-2 Insulation Characteristics for Si84xxxB* Parameter Maximum Working Insulation Voltage Input to Output Test Voltage Transient Overvoltage Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance 500 *Note: ...
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Table 11. Thermal Characteristics Parameter Symbol IC Junction-to-Air Thermal Resistance 500 400 300 200 100 0 0 Figure 2. (NB SOIC-16) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 Test Condition JA ...
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Si8460/61/62/63 2. Functional Description 2.1. Theory of Operation The operation of an Si846x channel is analogous to that of an opto coupler, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path ...
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Eye Diagram Figure 5 illustrates an eye-diagram taken on an Si8460. For the data source, the test used an Anritsu (MP1763C) Pulse Pattern Generator set to 1000 ns/div. The output of the generator's clock and data from an Si8460 ...
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Si8460/61/62/63 2.3. Device Operation Device behavior during startup, normal operation, and shutdown is shown in Table 12. Table 12. Si846x Logic Operation Table V VDDI VDDO I 1,3,4 1,3,4 1,2 State State Input ...
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Layout Recommendations To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V (creepage/clearance component, such as a ...
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Si8460/61/62/63 2.5. Typical Performance Characteristics The typical performance characteristics depicted in the following diagrams are for information purposes only. Refer to Tables 3, 4, and 5 for actual specification limits ...
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Data Rate (Mbps) Figure 12. Si8463 Typical V DD1 Current vs. Data Rate 5, ...
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Si8460/61/62/63 Figure 14. Si84xx Time-Dependent Dielectric Breakdown 26 Rev. 1.3 ...
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... Power Supply Bypass Capacitors (Revision A and Revision B) When using the ISOpro isolators with power supplies > 4.5 V, sufficient VDD bypass capacitors must be present on both the VDD1 and VDD2 pins to ensure the VDD rise time is less than 0.5 V/µs (which is > 9 µs for a > 4.5 V supply). Although rise time is power supply dependent, > ...
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Si8460/61/62/63 4. Pin Descriptions DD1 DD2 DD1 RCVR XMITR XMITR RCVR XMITR RCVR ...
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... Si8463BA-B-IS1 3 Si8460AB-B-IS1 6 Si8460BB-B-IS1 6 Si8461AB-B-IS1 5 Si8461BB-B-IS1 5 Si8462AB-B-IS1 4 Si8462BB-B-IS1 4 Si8463AB-B-IS1 3 Si8463BB-B-IS1 3 Notes: 1. All packages are RoHS-compliant. Moisture sensitivity level is MSL2A with peak reflow temperature of 260 °C according to the JEDEC industry standard classifications and peak solder temperature. 2. Revision A devices are supported for existing designs, but Revision B is recommended for all new designs. ...
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... Si8463BA-A-IS1 3 Si8460AB-A-IS1 6 Si8460BB-A-IS1 6 Si8461AB-A-IS1 5 Si8461BB-A-IS1 5 Si8462AB-A-IS1 4 Si8462BB-A-IS1 4 Si8463AB-A-IS1 3 Si8463BB-A-IS1 3 Notes: 1. All packages are RoHS-compliant. Moisture sensitivity level is MSL2A with peak reflow temperature of 260 °C according to the JEDEC industry standard classifications and peak solder temperature. 2. Revision A devices are supported for existing designs, but Revision B is recommended for all new designs. ...
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Package Outline: 16-Pin Narrow Body SOIC Figure 15 illustrates the package details for the Si846x in a 16-pin narrow-body SOIC (SO-16). Table 15 lists the values for the dimensions shown in the illustration. Figure 15. 16-pin Small Outline Integrated ...
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Si8460/61/62/63 Table 15. Package Diagram Dimensions (Continued) h θ aaa bbb ccc ddd Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Solid ...
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Land Pattern: 16-Pin Narrow Body SOIC Figure 16 illustrates the recommended land pattern details for the Si846x in a 16-pin narrow-body SOIC. Table 16 lists the values for the dimensions shown in the illustration. Figure 16. 16-Pin Narrow Body ...
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Si8460/61/62/63 8. Top Marking: 16-Pin Narrow Body SOIC Figure 17. 16-Pin Narrow Body SOIC Top Marking Table 17. 16-Pin Narrow Body SOIC Top Marking Table Line 1 Marking: Base Part Number Ordering Options (See Ordering Guide for more information). Line ...
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OCUMENT HANGE IST Revision 0.1 to Revision 0.2 Updated all specs to reflect latest silicon. Added "3. Errata and Design Migration Guidelines" on page 27. Added "8. Top Marking: 16-Pin Narrow Body SOIC" on ...
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