HCPL-2430-000E Avago Technologies US Inc., HCPL-2430-000E Datasheet - Page 14

• Manufacturer Part Number: HCPL-2430-000E
• Description: ISOLAT 3.75KVRMS 2CH UNIDIR 8DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-2430-000E

• Package / Case: 8-DIP (0.300", 7.62mm)
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 2, Unidirectional
• Current - Output / Channel: 25mA
• Data Rate: 40MBd
• Propagation Delay High - Low @ If: 33ns @ 7mA
• Current - Dc Forward (if): 10mA
• Input Type: DC
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Through Hole
• Isolation Voltage: 3750 Vrms
• Maximum Continuous Output Current: 25 mA
• Maximum Fall Time: 0.01 us
• Maximum Forward Diode Current: 10 mA
• Minimum Forward Diode Voltage: 1.1 V
• Output Device: Logic Gate Photo IC
• Configuration: 2 Channel
• Maximum Baud Rate: 40 MBd(Typ)
• Maximum Forward Diode Voltage: 1.5 V
• Maximum Reverse Diode Voltage: 2 V
• Maximum Power Dissipation: 350 mW
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• No. Of Channels: 2
• Optocoupler Output Type: Logic Gate
• Input Current: 8mA
• Output Voltage: 18V
• Opto Case Style: DIP
• No. Of Pins: 8
• Body Material: 2
• Common Mode Ratio: 1000
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1539-5

Propagation Delay, Pulse-Width Distortion and Propa-
gation Delay Skew
Propagation delay is a figure of merit which describes
how quickly a logic signal propagates through a sys-
tem. The propagation delay from low to high (t
amount of time required for an input signal to propa-
gate to the output, causing the output to change from
low to high. Similarly, the propagation delay from high
to low (t
signal to propagate to the output, causing the output to
change from high to low (see Figure 5).
Pulse-width distortion (PWD) results when t
differ in value. PWD is defined as the difference between
t
rate capability of a transmission system. PWD can be ex-
pressed in percent by dividing the PWD (in ns) by the
minimum pulse width (in ns) being transmitted. Typi-
cally, PWD on the order of 20-30% of the minimum pulse
width is tolerable; the exact figure depends on the par-
ticular application (RS232, RS422, T-1, etc.).
Propagation delay skew, t
eter to consider in parallel data applications where
synchronization of signals on parallel data lines is a con-
cern. If the parallel data is being sent through a group
of optocouplers, differences in propagation delays will
cause the data to arrive at the outputs of the optocou-
plers at different times. If this difference in propagation
delays is large enough, it will determine the maximum
rate at which parallel data can be sent through the op-
tocouplers.
Propagation delay skew is defined as the difference be-
tween the minimum and maximum propagation delays,
either t
which are operating under the same conditions (i.e., the
same drive current, supply voltage, output load, and op-
erating temperature). As illustrated in Figure 15, if the in-
puts of a group of optocouplers are switched either ON
or OFF at the same time, t
the shortest propagation delay, either t
longest pro-pagation delay, either t
As mentioned earlier, t
parallel data transmission rate. Figure 16 is the timing
diagram of a typical parallel data application with both
the clock and the data lines being sent through opto-
couplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. To obtain the
maximum data transmission rate, both edges of the
clock signals are being used to clock the data; if only one
edge were used, the clock signal would need to be twice
as fast.
PLH
and t
PLH
PHL
PHL
) is the amount of time required for the input
or t
and often determines the maximum data
PHL
, for any given group of optocouplers
PSK
can determine the maximum
PSK
PSK
, is an important param-
is the difference between
PLH
or t
PLH
or t
PHL
.
PLH
PHL
PLH
, and the
and t
) is the
PHL
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an
optocoupler. Figure 16 shows that there will be uncer-
tainty in both the data and the clock lines. It is impor-
tant that these two areas of uncertainty not overlap,
otherwise the clock signal might arrive before all of the
data outputs have settled, or some of the data outputs
may start to change before the clock signal has arrived.
From these considerations, the absolute minimum pulse
width that can be sent through optocouplers in a par-
allel application is twice t
use a slightly longer pulse width to ensure that any addi-
tional uncertainty in the rest of the circuit does not cause
a problem.
The HCPL-2400/30 optocouplers offer the advantages of
guaranteed specifications for propagation delays, pulse-
width distortion, and propagation delay skew over the
recommended temperature, input current, and power
supply ranges.
Application Circuit
A recommended LED drive circuit is shown in Figure 13.
This circuit utilizes several techniques to minimize the
total pulse-width distortion at the output of the opto-
coupler. By using two inverting TTL gates connected in
series, the inherent pulse-width distortion of each gate
cancels the distortion of the other gate. For best results,
the two series-connected gates should be from the same
package.
The circuit in Figure 13 also uses techniques known as
prebias and peaking to enhance the performance of the
optocoupler LED. Prebias is a small forward voltage ap-
plied to the LED when the LED is off. This small prebias
voltage partially charges the junction capacitance of the
LED, allowing the LED to turn on more quickly. The speed
of the LED is further increased by applying momentary
current peaks to the LED during the turn-on and turn-off
transitions of the drive current. These peak currents help
to charge and discharge the capacitances of the LED
more quickly, shortening the time required for the LED
to turn on and off.
PHZ
. A cautious design should