HCPL-3180-560E Avago Technologies US Inc., HCPL-3180-560E Datasheet - Page 7

• Manufacturer Part Number: HCPL-3180-560E
• Description: OPTOCOUPLER DRVR 2.5A VDE 8-SMD
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-3180-560E

• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 2.5A
• Propagation Delay High - Low @ If: 150ns @ 10mA
• Current - Dc Forward (if): 16mA
• Input Type: DC
• Output Type: Gate Driver
• Mounting Type: Surface Mount
• Package / Case: 8-SMD Gull Wing
• No. Of Channels: 1
• Optocoupler Output Type: Gate Drive
• Input Current: 16mA
• Output Voltage: 20V
• Opto Case Style: SMD
• No. Of Pins: 8
• Propagation Delay Low-high: 0.2µs
• Isolation Voltage: 3.75kV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Specifications (AC)
Over recommended operating conditions unless otherwise specified.
Parameter
Notes:
1. Derate linearly above +70°C free air temperature at a rate of 0.3 mA/°C.
2. Maximum pulse width = 10 µs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak
3. Derate linearly above +70°C, free air temperature at the rate of 4.8 mW/°C.
4. Derate linearly above +70°C, free air temperature at the rate of 5.4 mW/°C. The maximum LED junction temperature should not exceed
5. Maximum pulse width = 50 µs, maximum duty cycle = 0.5%.
6. In this test, V
7. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 4500 V
9. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together.
10. PWD is defined as |t
11. Pin 1 and 4 need to be connected to LED common.
12. Common mode transient immunity in the high state is the maximum tolerable dV
13. Common mode transient immunity in a low state is the maximum tolerable dV
14. t
15. The difference between t
7
Package Characteristics
Parameter
Propagation Delay Time to
High Output Level
Propagation Delay Time to
Low Output Level
Pulse Width Distortion
Propagation Delay
Difference Between Any
Two Parts or Channels
Rise Time
Fall Time
UVLO turn On Delay
UVLO turn Off Delay
Output High Level Common
Mode Transient Immunity
Output Low Level Common
Mode Transient Immunity
Input-Output Momentary
Withstand Voltage
Input-Output Resistance
Input-Output Capacitance
minimum = 2.0 A. See Application section for additional details on limiting IOL peak.
+125°C.
tion current limit I
output will remain in the high state (i.e. V
put will remain in a low state (i.e. V
signal. t
V
PHL
O
signal.
propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the falling edge of the V
PLH
propagation delay is measured from the 50% level on the rising edge of the input pulse to the 50% level of the rising edge of the
OH
is measured with a dc load current. When driving capacitive load V
I-O
PHL
< 5 µA).
- t
PHL
PLH
| for any given device.
and t
PLH
O
Symbol
t
t
PWD
PDD
(t
t
t
t
t
|CM
|CM
< 1.0 V).
PLH
PHL
r
f
UVLO ON
UVLO OFF
between any two HCPL-3180 parts under same test conditions.
PHL-
Symbol
V
R
C
ISO
I-O
I-O
H
L
O
|
t
|
> 10.0 V).
PLH
)
Min.
50
50
-90
10
10
Min.
3750
Typ.
150
150
20
25
25
2.0
0.3
Typ.
10
1
[11]
Max.
200
200
65
90
CM
Max.
/dt of the common mode pulse, V
CM
OH
/dt of the common mode pulse V
will approach V
Units
ns
ns
ns
ns
ns
ns
µs
µs
kV/µs
kV/µs
Units
V
Ω
pF
rms
Test
Conditions
I
R
f = 250 kHz,
Duty Cycle = 50%,
C
CL = 1 nF,
R
T
I
V
V
F =
F
A
g
g
g
CM
CC
= 10 to 16 mA,
CC
= 25°C,
= 10 Ω,
= 0 Ω
= 10 nF
Test
Conditions
T
RH < 50%
V
Freq = 1 MHz
10 mA,
= 20 V
A
as I
= 1.5 kV,
I-O
= 25°C,
= 500 V
OH
rms
approaches zero amps.
for 1 second (leakage detec-
CM
CM
, to assure that the out-
to assure that the
Fig.
Fig.
10, 11,
12, 13,
14, 23
34, 35
23
22
22
24
24
Note
8,9
9
Note
14
10
10
11, 12
11, 13
O