OPTOCOUPLER 15MBD UL 8-SMD GW

HCPL-260L-320

Manufacturer Part NumberHCPL-260L-320
DescriptionOPTOCOUPLER 15MBD UL 8-SMD GW
ManufacturerAvago Technologies US Inc.
HCPL-260L-320 datasheet
 

Specifications of HCPL-260L-320

Package / Case8-SMD Gull WingVoltage - Isolation5000Vrms
Number Of Channels1, UnidirectionalCurrent - Output / Channel50mA
Data Rate15MBdPropagation Delay High - Low @ If50ns @ 7.5mA
Current - Dc Forward (if)20mAInput TypeDC
Output TypeOpen CollectorMounting TypeSurface Mount, Gull Wing
Isolation Voltage3750 VrmsMaximum Continuous Output Current50 mA
Maximum Fall Time20 nsMaximum Forward Diode Current20 mA
Maximum Rise Time45 nsMinimum Forward Diode Voltage1.4 V
Output DeviceLogic Gate Photo ICConfiguration1 Channel
Maximum Baud Rate15 MBpsMaximum Forward Diode Voltage1.75 V
Maximum Reverse Diode Voltage5 VMaximum Power Dissipation85 mW
Maximum Operating Temperature+ 85 CMinimum Operating Temperature- 40 C
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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Likewise for common-mode transients which occur
when the LED is off (i.e. CMR
, since the output is “high”),
H
if an imbalance between I
and I
LP
LN
I
equal to or greater than the switching threshold of the
F
optocoupler, the transient “signal” may cause the output
to spike below 2 V (which consti tutes a CMR
By using the recommended circuit in Figure 13, good
CMR can be achieved. The balanced I
help equalize I
and I
to reduce the amount by which
LP
LN
I
is modulated from transient coupling through C
LED
and C
.
LC
CMR with Other Drive Circuits
CMR performance with drive circuits other than that
shown in Figure 13 may be enhanced by following these
guidelines:
1. Use of drive circuits where current is shunted from the
LED in the LED “off” state (as shown in Figures 15 and
16). This is beneficial for good CMR
2. Use of I
> 3.5 mA. This is good for high CMR
FH
Figure 15 shows a circuit which can be used with any
totem-pole-output TTL/LSTTL/HCMOS logic gate. The
buffer PNP transistor allows the circuit to be used with
logic devices which have low current-sinking capability.
It also helps maintain the driving-gate power-supply cur-
rent at a constant level to minimize ground shifting for
other devices connected to the input-supply ground.
When using an open-collector TTL or open-drain CMOS
logic gate, the circuit in Figure 16 may be used. When
using a CMOS gate to drive the optocoupler, the circuit
shown in Figure 17 may be used. The diode in parallel
with the R
speeds the turn-off of the optocoupler
LED
LED.
For product information and a complete list of distributors, please go to our website:
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes AV01-0581EN
AV02-0616EN - February 8, 2010
results in a transient
failure).
H
74L504
(ANY
TTL/CMOS
GATE)
-setting resistors
LED
LA
Figure 15. TTL interface circuit.
V
.
H
.
L
(OR ANY
OPEN-COLLECTOR/
OPEN-DRAIN
LOGIC GATE)
Figure 16. TTL open-collector/open drain gate drive circuit.
74HC04
(OR ANY
TOTEM-POLE
OUTPUT LOGIC
GATE)
Figure 17. CMOS gate drive circuit.
www.avagotech.com
V
CC
HCPL-260L
1
420 Ω
(MAX)
2
2N3906
(ANY PNP)
LED
3
4
CC
1
R
2
74HC00
3
4
V
CC
HCPL-260L
1
1N4148
2
220 Ω
3
4
HCPL-260L
LED
LED