ACPL-M61L-000E Avago Technologies US Inc., ACPL-M61L-000E Datasheet - Page 17

• Manufacturer Part Number: ACPL-M61L-000E
• Description: OPTOCOUPLER 10MBD ULP 5-SOIC
• Manufacturer: Avago Technologies US Inc.
• Series: R²Coupler™r

Specifications of ACPL-M61L-000E

• Package / Case: 6-SOIC (0.173", 4.40mm Width) 5 Leads
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 10mA
• Data Rate: 10MBd
• Propagation Delay High - Low @ If: 46ns @ 6.5mA
• Current - Dc Forward (if): 8mA
• Input Type: DC
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Surface Mount
• Isolation Voltage: 3750 Vrms
• Maximum Fall Time: 12 ns
• Maximum Rise Time: 12 ns
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 10 MBps
• Maximum Forward Diode Voltage: 6.5 V
• Maximum Reverse Diode Voltage: 5 V
• Maximum Power Dissipation: 20 mW
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• No. Of Channels: 1
• Optocoupler Output Type: Logic Gate
• Input Current: 150mA
• Output Voltage: 7V
• Opto Case Style: SOIC
• No. Of Pins: 5
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-2169-5; ACPL-M61L-000E

Speed Improvement
A peaking capacitor can be placed across the input current
limit resistor (Figure 11) to achieve enhanced speed per-
formance. The value of the peaking cap is dependent
to the rise and fall time of the input signal and supply
voltages and LED input driving current (I
shows significant improvement of propagation delay and
pulse with distortion with added peak capacitor at driving
current of 2mA and 3.3V/5V power supply.
Figure 16. Connection of peaking capacitor (C
limiting resistor (R
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Avago, Avago Technologies, the A logo and R
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.
AV02-2150EN - February 14, 2011
V
in
+
−
GND
1
1
C
) to improve speed performance
R
peak
R
2
1
SHIELD
2
Coupler™ are trademarks of Avago Technologies in the United States and other countries.
peak
) in parallel of the input
F
). Figure 12
0.1PF
V
V
GND
DD2
0
2
www.avagotech.com
(i) V
(ii) V
Figure 17. Improvement of t
in parallel of input limiting resistor.
DD
DD
60
50
40
30
20
10
60
50
40
30
20
10
0
= 5V, C
0
= 3.3V, C
-40
-40
peak
peak
-20
-20
= 47pF, R
T
= 47pF, R
PHL
0
0
1
p
= 845:
V
1
and PWD with added 100pF peaking capacitor
V
DD2
T
T
= 430:
DD2
PHL
PHL
= 3.3 V, I
T
20
20
= 5 V, I
Temp (°C)
Temp (°C)
PHL
T
PWD
PLH
PWD
F
F
= 2 mA
40
40
= 2 mA
T
T
T
PLH
PLH
PLH
60
60
No Peaking
With Peaking
No Peaking
With Peaking
80
80
100
100