74OL6011S Fairchild Optoelectronics Group, 74OL6011S Datasheet

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74OL6011S

Manufacturer Part Number
74OL6011S
Description
OPTOCOUPLER CMOS INV 6-SOIC
Manufacturer
Fairchild Optoelectronics Group
Series
OPTOLOGIC™ OPTOPLANAR®r
Datasheet

Specifications of 74OL6011S

Voltage - Isolation
5300Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
40mA
Data Rate
15MBd
Propagation Delay High - Low @ If
60ns
Input Type
Logic
Output Type
Open Collector
Mounting Type
Surface Mount
Package / Case
6-SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
740L6011S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74OL6011SD
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
FEATURES
• Industry first LSTTL to TTL and LSTTL to CMOS complete
• Incorporates LED drive circuitry — use as logic gate
• Very high speed
• Choice of buffer or inverter
• Choice of TTL or CMOS compatible output up to 15 volts
• Fan-out of 10 TTL loads, fan-in 1 LSTTL load
• Internal noise shield — very high CMR of ±15 kV/µS
• UL recognized (File #E90700)
• Same noise immunity as LSTTL/TTL.
DESCRIPTION
OPTOLOGIC™ is the first family of truly logic compatible optically coupled logic interface gates.
The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions
is available as a buffer (A=B), or as an inverter (A=B).
The LSTTL input compatibility is provided by an input integrated circuit, with industry standard logic levels. This input amplifier IC
switches a temperature compensated current source driving a high speed 850 nm AlGaAs LED emitter. This novel integration
scheme eliminates CTR degradation over time and temperature.
The emitter is optically coupled to an integrated photodetector/high-gain, high-speed output amplifier IC. The superior 15kV/µS
common-mode noise rejection is ensured through the use of an optically transparent noise shield.
The TTL compatible output has a totem-pole with a fan-out of 10. The CMOS compatible output has an open collector Schottky-
clamped transistor that interfaces to any CMOS logic between 4.5 and 15 volts. The 74OL6010/11 may also by used to drive power
MOSFETS or transistors up to 15 volts.
The Optologic coupler family typically offers propagation of delays of 60 ns and can support 15 MBaud data communication.
The two input chips and the output chip are assembled in a 6-pin DIP high insulation voltage plastic package. Fairchild’s proprietary
OPTOPLANAR
© 2003 Fairchild Semiconductor Corporation
logic-to-logic optocoupler
®
construction provides a withstand test voltage of 5300 VRMS (1 minute).
6
6
PACKAGE
1
1
6
LSTTL TO
LOGIC-TO-LOGIC OPTOCOUPLERS
1
Page 1 of 15
OPTOPLANAR
APPLICATIONS
• Transmission line interface — receiver and driver
• Excellent as bridged receiver in fast LAN highways
• Bus interface
• Logic family interface with ground loop noise elimination
• High speed AC/DC voltage sensing
• Driver for power semiconductor devices
• Level shifting
• Replaces fast pulse transformers
TTL BUFFER
TTL INVERTER
CMOS BUFFER
CMOS INVERTER
®
SYMBOL
HIGH-SPEED
INVERTER
BUFFER
74OL6000
74OL6001
74OL6010
74OL6011
10/1/03

Related parts for 74OL6011S

74OL6011S Summary of contents

Page 1

PACKAGE DESCRIPTION OPTOLOGIC™ is the first family of truly logic compatible optically coupled logic interface gates. The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing ...

Page 2

Vcc 22 k Ω TYP. INPUT GND LSTTL INPUT CIRCUIT All Inputs PIN CONFIGURATION 1-V (Input V ) 6-V (Output V CCI CC CCO 2-V (Data In) 5-V (Data Out 3-GND, (Input GND) 4-GND (Output GND) O DEVICE ...

Page 3

OL6000 NOISE SHIELD LSTLL to TTL Buffer © 2003 Fairchild Semiconductor Corporation OPTOPLANAR LOGIC-TO-LOGIC OPTOCOUPLERS LSTTL TO SCHEMATIC 74OL OL6001 74OL OL6010 NOISE NOISE SHIELD SHIELD ...

Page 4

ELECTRICAL CHARACTERISTICS Parameter Symbol Min Typ* TTL OUTPUT 74OL6000/01 Input Supply Voltage V CCI Output Supply Voltage V CCO High-Level Input Voltage V IH Low-Level Input Voltage V IL Input Clamp Voltage V IK High-Level Input Current I IH Low-Level ...

Page 5

ELECTRICAL CHARACTERISTICS Parameter Symbol Min CMOS OUTPUT 74OL6010/11 Input Supply Voltage V CCI Output Supply Voltage V CCO High-Level Input Voltage V Low-Level Input Voltage V Input Clamp Voltage V High-Level Input Current I IH Low-Level Input Current I IL ...

Page 6

ABSOLUTE MAXIMUM RATINGS Parameter TOTAL DEVICE Storage Temperature Operating Temperature Lead Solder Temperature Power Dissipation EMITTER Input Supply Voltage Input Voltage DETECTOR Average Output Current Output Supply Voltage Output Voltage ELECTRICAL CHARACERISTICS Parameter 74OL6000/01/10/11 Common Mode Transient Immunity at Logic ...

Page 7

Figure 1. Input Current vs. Ambient Temperature 100 5.5V CCI V = 4.5V IH -100 V = 0.4V IL -200 -300 -40 - AMBIENT TEMPERATURE ( ˚C) A Figure 3. Output Supply Current ...

Page 8

Figure 7. 74OL6010/11 Leakage Current vs. Ambient Temperature -40 - AMBIENT TEMPERATURE ( ˚C) A Figure 9. 74OL6010/11 Switching Times vs. Ambient Temperature CCO V = 15V ...

Page 9

Figure 13. Input Threshold Voltage vs. Ambient Temperature 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.0 -40 - AMBIENT TEMPERATURE ( ° Figure 15. Switching Time Test Circuit V CCI .1µF ...

Page 10

Figure 17. 74OL6000/01 Switching Times vs. Ambient Temperature INPUT PLH OUTPUT (74OL6000 OUTPUT (74OL6001) t PHL Figure 19. Common Mode Rejection Waveforms ...

Page 11

Package Dimensions (Through Hole) PIN 1 ID. 0.270 (6.86) 0.240 (6.10) 0.350 (8.89) 0.330 (8.38) 0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.115 (2.92) 0.020 (0.51) 0.154 (3.90) MIN 0.100 (2.54) 0.016 (0.40) 0.008 (0.20) 0.022 (0.56) 0° to 15° 0.016 ...

Page 12

ORDERING INFORMATION Option Order Entry Identifi . 300 .300 300W .300W 3S .3S 3SD .3SD MARKING INFORMATION Definitions © 2003 Fairchild Semiconductor Corporation OPTOPLANAR LOGIC-TO-LOGIC OPTOCOUPLERS LSTTL TO VDE ...

Page 13

Reflow Profile (Black Package, No Suffix) 300 250 225 C peak 200 150 Time above 183° C, 60–150 sec 100 50 Ramp C/sec 0 0 0.5 1 1.5 2 Time (Minute) © 2003 Fairchild Semiconductor Corporation OPTOPLANAR ...

Page 14

APPLICATION Local area data communication systems can greately improve their noise immunity by including OPOTOLOGIC gates in the design. The Optologic input amplifier offers the feature of very high input impedance that permits their use as bridged line receivers. The ...

Page 15

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT ...

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