HCPL-2602-000E Avago Technologies US Inc., HCPL-2602-000E Datasheet - Page 14

• Manufacturer Part Number: HCPL-2602-000E
• Description: OPTOCOUPLER LOG-OUT 1CHAN 8-DIP
• Manufacturer: Avago Technologies US Inc.
• Type: Line Receiverr

Specifications of HCPL-2602-000E

• Package / Case: 8-DIP (0.300", 7.62mm)
• Voltage - Isolation: 3750Vrms
• Input Type: AC, DC
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Isolation Voltage: 3750 Vrms
• Maximum Continuous Output Current: 50 mA
• Maximum Fall Time: 0.01 us
• Maximum Forward Diode Current: 60 mA
• Output Device: Integrated Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 10 MBd
• Maximum Forward Diode Voltage: 2.7 V
• Maximum Reverse Diode Voltage: 0.95 V
• Maximum Power Dissipation: 40 mW
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Elements: 1
• Output Type: Open Collector
• Baud Rate: 10Mbps
• Forward Voltage: 2.7V
• Forward Current: 60mA
• Output Current: 50mA
• Package Type: PDIP
• Operating Temp Range: 0C to 70C
• Power Dissipation: 40mW
• Propagation Delay Time: 75ns
• Pin Count: 8
• Mounting: Through Hole
• Reverse Breakdown Voltage: 0.95V
• Operating Temperature Classification: Commercial
• No. Of Channels: 1
• Optocoupler Output Type: Logic Gate
• Input Current: 60mA
• Output Voltage: 5.5V
• Opto Case Style: DIP
• No. Of Pins: 8
• Input Current Max: 60mA
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1662-5

different circuit configuration
could make t
case NOR gates would be pre-
ferred. If it is not known whether
t
drive conditions may vary over the
boundary for these conditions, the
exclusive-OR flip-flop of Figure (d)
should be used.
RS-422 and RS-423
Line drivers designed for RS-422
and RS-423 generally provide
adequate voltage and current for
operating the HCPL-2602/12. Most
drivers also have characteristics
allowing the HCPL-2602/12 to be
connected directly to the driver
terminals. Worst case drive
conditions, however, would
require current shunting to
prevent overstress of the HCPL-
2602/12.
Propagation Delay, Pulse-Width
Distortion and Propagation Delay Skew
Propagation delay is a figure of
merit which describes how quickly
a logic signal propagates through a
system. The propagation delay
from low to high (t
amount of time required for an
input signal to propagate to the
output, causing the output to
change from low to high. Similarly,
the propagation delay from high to
low (t
required for the input signal to
propagate to the output, causing
the output to change from high to
low (see Figure 6).
Pulse-width distortion (PWD)
results when t
value. PWD is defined as the
difference between t
and often determines the
maximum data rate capability of a
transmission system. PWD can be
expressed in percent by dividing
14
PHL
> t
PHL
PLH
) is the amount of time
or t
PHL
PHL
PLH
< t
< t
and t
PLH
PLH
PLH
PLH
) is the
, or if the
, in which
PHL
and t
differ in
PHL
the PWD (in ns) by the minimum
pulse width (in ns) being
transmitted. Typically, PWD on
the order of 20-30% of the
minimum pulse width is tolerable;
the exact figure depends on the
particular application (RS232,
RS422, T-1, etc.).
Propagation delay skew, t
important parameter to consider
in parallel data applications
where synchronization of signals
on parallel data lines is a concern.
If the parallel data is being sent
through a group of optocouplers,
differences in propagation delays
will cause the data to arrive at the
outputs of the optocouplers at
different times. If this difference
in propagation delays is large
enough, it will determine the
maximum rate at which parallel
data can be sent through the
optocouplers.
Propagation delay skew is defined
as the difference between the
minimum and maximum
propagation delays, either t
t
optocouplers which are operating
under the same conditions (i.e.,
the same drive current, supply
voltage, output load, and
operating temperature). As
illustrated in Figure 16, if the
inputs of a group of optocouplers
are switched either ON or OFF at
the same time, t
difference between the shortest
propagation delay, either t
t
delay, either t
As mentioned earlier, t
determine the maximum parallel
data transmission rate. Figure 17
is the timing diagram of a typical
parallel data application with
PHL
PHL
, for any given group of
, and the longest propagation
PLH
PSK
or t
is the
PHL
.
PSK
PSK
can
PHL
PLH
, is an
or
or
both the clock and the data lines
being sent through optocouplers.
The figure shows data and clock
signals at the inputs and outputs
of the optocouplers. To obtain the
maximum data transmission rate,
both edges of the clock signal are
being used to clock the data; if
only one edge were used, the
clock signal would need to be
twice as fast.
Propagation delay skew
represents the uncertainty of
where an edge might be after
being sent through an
optocoupler. Figure 17 shows that
there will be uncertainty in both
the data and the clock lines. It is
important that these two areas of
uncertainty not overlap,
otherwise the clock signal might
arrive before all of the data
outputs have settled, or some of
the data outputs may start to
change before the clock signal has
arrived. From these
considerations, the absolute
minimum pulse width that can be
sent through optocouplers in a
parallel application is twice t
cautious design should use a
slightly longer pulse width to
ensure that any additional
uncertainty in the rest of the
circuit does not cause a problem.
The t
offer the advantages of
guaranteed specifications for
propagation delays, pulse-width
distortion and propagation delay
skew over the recommended
temperature, input current, and
power supply ranges.
PSK
specified optocouplers
PSK
. A