HCPL-4200 Avago Technologies US Inc., HCPL-4200 Datasheet - Page 8

• Manufacturer Part Number: HCPL-4200
• Description: OPTOCOUPLER RECEIVER 20MA 8-DIP
• Manufacturer: Avago Technologies US Inc.
• Type: Receiverr

Specifications of HCPL-4200

• Mounting Type: Through Hole
• Voltage - Isolation: 3750Vrms
• Input Type: DC
• Voltage - Supply: 4.5 V ~ 20 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• No. Of Channels: 1
• Isolation Voltage: 3.75kV
• Optocoupler Output Type: Logic Gate
• Input Current: 24mA
• Output Voltage: 20V
• Opto Case Style: DIP
• No. Of Pins: 8
• Propagation Delay: 0.23µs
• Output Type: And
• Package Type: 8-Pin DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 516-1149-5

Notes:
10. The fall time, t
11. Common mode transient immunity in the logic high level is the maximum (negative) dV
12. Common mode transient immunity in the logic low level is the maximum (positive) dV
13. Use of a 0.1 μF bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler momentary withstand is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1
Figure 2. Typical Output Voltage vs. Loop Cur-
rent.
8
Figure 5. Typical Input Voltage vs. Temperature.
1. ≤ 1 μs pulse width, 300 pps.
2. Derate linearly above 70°C free air temperature at a rate of 1.6 mW/ °C. Proper application of the derating factors will prevent IC junction
3. Derate linearly above 70°C free air temperature at a rate of 3.8 mW/ °C.
4. Derate linearly above 70°C free air temperature at a rate of 4.6 mW/ °C.
5. Duration of output short circuit time shall not exceed 10 ms.
6. The device is considered a two terminal device, pins 1, 2, 3, and 4 are connected together and pins 5, 6, 7, and 8 are connected together.
7. The t
8. The t
9. The rise time, t
temperatures from exceeding 125°C for ambient temperatures up to 85°C.
the output pulse.
output pulse.
V
V
second (leakage detection current limit, I
2.8
2.6
2.4
2.2
CM
CM
-50
, which can be sustained with the output voltage in the logic low state (i.e., V
, which can be sustained with the output voltage in the logic high state (i.e., V
PHL
PLH
T
-25
propagation delay is measured from the 10 mA level on the trailing edge of the input pulse to the 1.3 V level on the trailing edge of the
propagation delay is measured from the 10 mA level on the leading edge of the input pulse to the 1.3 V level on the leading edge of
A
– AMBIENT TEMPERATURE –°C
f
, is measured from the 90% to the 10% level on the falling edge of the output logic pulse.
r
0
, is measured from the 10% to the 90% level on the rising edge of the output logic pulse.
I
I
I
I
= 20 mA
= 12 mA
25
50
75
100
i-o
≤ 5 μA).
Figure 3. Typical Current Switching Threshold vs.
Temperature.
Figure 6. Typical Logic Low Output Voltage vs.
Temperature.
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
10
8
6
4
2
0
0
-50
-60
-40
T
-25
A
– AMBIENT TEMPERATURE –°C
-20
T
A
– TEMPERATURE –°C
0
I
0
HYS
25
20
V
I
I
I
O
CC
= 3 mA
40
= 6.4 mA
50
= 4.5 V
60
O
O
≤ 0.8 V).
≥ 2 V).
75
80
CM
100
100
CM
/dt on the leading edge of the common mode pulse,
/dt on the trailing edge of the common mode pulse,
Figure 4. Typical Input Loop Voltage vs. Input
Current.
Figure 7. Typical Logic High Output Current vs.
Temperature.
-1
-2
-3
-4
-5
-6
-7
-8
0
-60
V
V
O
O
= 2.7 V
= 2.4 V
-40
-20
T
A
– TEMPERATURE –°C
0
20
V
I
I
CC
= 12 mA
40
= 4.5 V
60
80
100