HYS64T128020HU-3S-B Qimonda, HYS64T128020HU-3S-B Datasheet - Page 31

• Manufacturer Part Number: HYS64T128020HU-3S-B
• Description: MODULE DDR2 1GB 240-DIMM
• Manufacturer: Qimonda

Specifications of HYS64T128020HU-3S-B

• Memory Type: DDR2 SDRAM
• Memory Size: 1GB
• Speed: 333MHz
• Package / Case: 240-DIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 675-1024

Rev. 1.3, 2006-12
03292006-6GMD-RSFT
Parameter
DQ output access time from CK / CK
CAS A to CAS B command period
CK, CK high-level width
CKE minimum high and low pulse width
CK, CK low-level width
Auto-Precharge write recovery + precharge
time
Minimum time clocks remain ON after CKE
asynchronously drops LOW
DQ and DM input hold time (differential data
strobe)
DQ and DM input hold time (single ended data
strobe)
DQ and DM input pulse width (each input)
DQS output access time from CK / CK
DQS input low (high) pulse width (write cycle)
DQS-DQ skew (for DQS & associated DQ
signals)
Write command to 1st DQS latching transition
DQ and DM input setup time (differential data
strobe)
DQ and DM input setup time (single ended
data strobe)
DQS falling edge hold time from CK (write
cycle)
DQS falling edge to CK setup time (write cycle)
Clock half period
Data-out high-impedance time from CK / CK
Address and control input hold time
Address and control input pulse width
(each input)
Address and control input setup time
DQ low-impedance time from CK / CK
DQS low-impedance from CK / CK
Mode register set command cycle time
OCD drive mode output delay
Data output hold time from DQS
Data hold skew factor
Average periodic refresh Interval
DRAM Component Timing Parameter by Speed Grade - DDR2-400
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AC
CCD
CH
CKE
CL
DAL
DELAY
DH
DH1
DIPW
DQSCK
DQSL,H
DQSQ
DQSS
DS
DS1
DSH
DSS
HP
HZ
IH
IPW
IS
LZ(DQ)
LZ(DQS)
MRD
OIT
QH
QHS
REFI
(base)
(base)
(base)
(base)
(base)
(base)
31
HYS[64/72]T[32/64/128]xx0HU-[25F/2.5/3/3S/3.7/5]-B
DDR2–400
–600
2
0.45
3
0.45
WR +
t
275
–25
0.35
–500
0.35
—
– 0.25
150
–25
0.2
0.2
MIN. (
—
475
0.6
350
2 ×
t
2
0
t
—
—
Min.
IS
AC.MIN
HP
+
–
t
AC.MIN
t
t
CK
QHS
t
t
CL,
RP
+
t
t
IH
CH
)
Max.
+600
—
0.55
—
0.55
—
—
—
—
—
+500
—
350
+ 0.25
—
—
—
—
t
—
—
—
t
t
—
12
—
450
7.8
AC.MAX
AC.MAX
AC.MAX
Unbuffered DDR2 SDRAM Module
Unit
ps
t
t
t
t
t
ns
ps
ps
t
ps
t
ps
t
ps
ps
t
t
—
ps
ps
t
ps
ps
ps
t
ns
—
ps
µs
Internet Data Sheet
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
TABLE 19
Note
1)2)3)4)5)6)7)
8)21)
9)
10)
11)
11)
11)
11)
12)
13)
11)
11)
14)
14)
14)15)