HDSP-2533 Avago Technologies US Inc., HDSP-2533 Datasheet - Page 5

• Manufacturer Part Number: HDSP-2533
• Description: LED DISPLAY 5X7 8CHAR 5MM GREEN
• Manufacturer: Avago Technologies US Inc.
• Series: HDSP-253xr

Specifications of HDSP-2533

• Display Type: Alphanumeric
• Common Pin: *
• Package / Case: 28-DIP
• Color: Green
• Size / Dimension: 1.69" x .45" (42.9mm x 11.4mm)
• Number Of Digits/alpha: 8
• Digit/alpha Size: 0.20" (5mm)
• Number Of Digits: 8
• Character Size: 2.54 mm x 4.57 mm
• Illumination Color: Green
• Wavelength: 574 nm
• Operating Voltage: 5 V
• Operating Current: 370 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Luminous Intensity: 7.5 ucd
• Viewing Area (w X H): 40.06 mm x 4.57 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1169-5

AC Timing Characteristics over Temperature Range
V
Reference
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
Notes:
1. Worst case values occur at an IC junction temperature of 125°C.
2. For designers who do not need to read from the display, the Read line can be tied to V
3. Changing the logic levels of the Address lines when CE = “0” may cause erroneous data to be entered into the Character RAM, regardless of the
4. The display must not be accessed until after 3 clock­ pulses (110 µs min. using the internal refresh clock­) after the rising edge of the reset line.
Symbol
F
F
F
t
Notes:
5. F
6. F
7. t
5
ST
OSC
RF [5]
FL [6]
DD
[7]
together.
logic levels of the WR and RD lines.
ST
RF
FL
= 4.5 to 5.5 V unless otherwise specified.
= 262,144/F
= F
= F
OSC
OSC
/28,672.
/224.
Description
Oscillator Frequency
Display Refresh Rate
Character Flash Rate
Self Test Cycle Time
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
OSC
ACC
ACS
CE
ACH
CER
CES
CEH
W
WD
DH
R
RD
DF
RC
.
Description
Display Access Time
Write
Read
Address Setup Time to Chip Enable
Chip Enable Active Time
Write
Read
Address Hold Time to Chip Enable
Chip Enable Recovery Time
Chip Enable Active Prior to Rising Edge of
Write
Read
Chip Enable Hold Time to Rising Edge of Read/Write Signal
Write Active Time
Data Valid Prior to Rising Edge of Write Signal
Data Write Hold Time
Chip Enable Active Prior to Valid Data
Read Active Prior to Valid Data
Read Data Float Delay
Reset Active Time
25°C Typical
57
256
2
4.6
[4]
[2, 3]
Minimum
28
128
1
9.2
[1]
[2, 3]
Units
k­Hz
Hz
Hz
sec
DD
and the Write and Chip Enable lines can be tied
[2,3]
Min.
210
230
10
140
160
20
60
140
160
0
100
50
20
160
75
10
300
[1]
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns