ADAPTER SKT ATF15XXB PLCC/TQFP

ATF15XXDK3-SAA100

Manufacturer Part NumberATF15XXDK3-SAA100
DescriptionADAPTER SKT ATF15XXB PLCC/TQFP
ManufacturerAtmel
ATF15XXDK3-SAA100 datasheet
 

Specifications of ATF15XXDK3-SAA100

Module/board TypeSocket Module - TQFPFor Use With/related ProductsATF15xxDK3
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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ATF15xx-DK3 Development Kit
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User Guide

ATF15XXDK3-SAA100 Summary of contents

  • Page 1

    ATF15xx-DK3 Development Kit .............................................................................................. User Guide ...

  • Page 2

    ... Power Supply Switch and Power LED..............................................2-10 2.1.10 Power Supply Jack and Power Supply Header ................................2-10 2.1.11 JTAG ISP Connector and TDO Selection Jumper............................2-11 2.2 Socket Adapter Board .............................................................................2-12 2.3 Atmel CPLD ISP Download Cable ..........................................................2-13 i 3605B–PLD–05/06 ...

  • Page 3

    Table of Contents ii 3605B–PLD–05/06 Section 3 CPLD Design Flow Tutorial .................................................................. 3-1 3.1 Create a Project using the “New Project Wizard” .....................................3-1 3.2 Add a Design File......................................................................................3-7 3.3 Synthesize the VHDL Design....................................................................3-7 3.4 Fit the Synthesized Design File ................................................................3-8 ...

  • Page 4

    ... CPLD Development/ Programmer Board ATF15xx-DK3 Development Kit User Guide The Atmel CPLD Development/Programmer Kit (P/N: ATF15xx-DK3 complete development system and an In-System Programming (ISP) programmer for the ATF15xx family of industry standard pin compatible Complex Programmable Logic Devices (CPLDs) with Logic Doubling and easy way to develop prototypes and evaluate new designs with an ATF15xx ISP CPLD ...

  • Page 5

    ... ProChip Designer v4.0 Patch Precision RTL Synthesis ModelSim Atmel CPLD ISP Software (ATMISP) POF2JED Conversion Utility User Guides and Tutorials The Atmel CPLD Development/Programmer Board supports the following devices in all speed grades and packages (except 100-PQFP): ATF1502BE ATF1502AS/ASL ATF1504BE ATF1504AS/ASL ATF1508ASV/ASVL ...

  • Page 6

    ... SVGA monitor (800 x 600 resolution) Part Number Description ATF15xx-DK3 Atmel CPLD Development/Programmer Kit (includes ATF15xxDK3-SAA44) ATF15xxDK3-SAA100 100-pin TQFP Socket Adapter Board for DK3 Board ATF15xxDK3-SAJ44 44-pin PLCC Socket Adapter Board for DK3 Board ATF15xxDK3-SAJ84 84-pin PLCC Socket Adapter Board for DK3 Board ...

  • Page 7

    ... README.TXT file through any ASCII text editor. ATF15xx Conversion from the POF2JED main window, click on HELP and then select Application Brief CONVERSION OPTIONS. For technical support on any Atmel PLD related issues, please contact Atmel PLD Appli- cations Group at: URL: www.atmel.com/dyn/products/support.asp FAQ: www.atmel.com/dyn/products/tech_support.asp?faq=y ...

  • Page 8

    ... ISP pro- grammer for the ATF15xx family of JTAG-ISP CPLDs. VccIO GCLR GOE Selector Switch Switch Section 2 Hardware Description 7-Segment Displays IccIO Jumper IccINT Jumper ATF15xxDK3-SAA44 Socket Adapter Board User I/O Pin Headers Device Socket LEDs Push-Button Switches 2-1 3605B–PLD–05/06 ...

  • Page 9

    ... Jumpers 2-2 3605B–PLD–05/06 Atmel CPLD Development/Programmer Board contains four seven-segment displays to allow the designers to observe the outputs of the ATF15xx CPLD. These four displays are labeled DSP1, DSP2, DSP3, and DSP4, and have common anode LEDs with the common anode lines connected to VCCIO (I/O supply voltage for the CPLD) through series resistors with selectable jumpers labeled JPDSP1, JPDSP2, JPDSP3, or JPDSP4 ...

  • Page 10

    ATF15xx-DK3 Development Kit User Guide Table 2-1. Connections of ATF15xx 44-pin TQFP to 7-segment Displays DSP/Segment PLD Pin # 1/A 27 1/B 33 1/C 30 1/D 21 1/E 18 1/F 23 1/G 20 1/DOT 31 2/A NC 2/B NC 2/C ...

  • Page 11

    Hardware Description 2-4 3605B–PLD–05/06 Table 2-3. Connections of ATF15xx 84-pin PLCC to 7-segment Displays DSP/Segment PLD Pin # 1/A 68 1/B 74 1/C 70 1/D 63 1/E 58 1/F 65 1/G 61 1/DOT 73 2/A 52 2/B 57 2/C 55 ...

  • Page 12

    ... Atmel CPLD Development/Programmer Board has eight individual LEDs, which allow designers to display the output signals from the user I/Os of the ATF15xx CPLD. These eight LEDs are labeled LED1 to LED8 on the Atmel CPLD Development/Programmer Board. The cathode of each LED is connected to ground through a series resistor while the anode of each LED is connected to a user I/O pin of the CPLD through the JPL1/JPL2/PL3/JPL4/JPL5/JPL6/JPL7/JPL8 selectable jumper ...

  • Page 13

    ... I/O pins of the CPLD. They allow designers to send input logic signals to the user I/O pins of the ATF15xx CPLD. These eight switches are labeled SW1 to SW8 on the Atmel CPLD Development/Programmer Board. One end of each input push-button switch is connected to VCCIO while the other end of each push- ...

  • Page 14

    ATF15xx-DK3 Development Kit User Guide Figure 2-4. Circuit Diagram of the Push-button Switches and Jumpers for the I/O Pins Table 2-9. Connections of ATF15xx 44-pin TQFP to the Switches for I/O Pins Push Button # SW1 SW2 SW3 SW4 SW5 ...

  • Page 15

    ... Global Clear (GCLR) and Output Enable (OE1) pins of the CPLD. They allow the designers to control the logic states of the OE1 and GCLR inputs of the ATF15xx CPLD. These two switches are labeled SW-GCLR and SW-GOE1 on the Atmel CPLD Develop- ment/Programmer Board. One end of the SW-GCLR input push-button switch is connected to ground (GND) ...

  • Page 16

    MHz Oscillator and Clock Selection Jumper ATF15xx-DK3 Development Kit User Guide shows the pin numbers of the GCLR and OE1 dedicated input pins of the ATF15xx in all the different available package types. Figure 2-5. Circuit Diagram of ...

  • Page 17

    ... ON, the Power LED (labeled POWER LED) will light up to indicate that the ATF15xx- DK3 board is supplied with power. The Atmel ATF15xx-DK3 Development/Programmer Board contains two different types of power supply connectors labeled JPower and JP Power. Either one of these power supply connectors can be used to connect power source to the board. The first power connector, labeled JPower barrel power jack with a 2 ...

  • Page 18

    JTAG ISP Connector and TDO Selection Jumper ATF15xx-DK3 Development Kit User Guide The JTAG ISP Connector, labeled JTAG-IN, is used to connect the ATF15xx’s JTAG port pins (TCK, TDI, TMS and TDO) through the ISP download cable to the ...

  • Page 19

    ... The pinout of this 10-pin JTAG Port Header is compatible with the Altera ByteBlasterMV, and ByteBlaster II cables. In addition, the ATMISP software allows users to choose either the Atmel CPLD ISP Cable or the ByteBlaster/ByteBlast- erMV/ByteBlaster II cable to implement ISP. Atmel ATF15xx-DK3 CPLD Development/Programmer Socket Adapter Boards (ATF15xx-DK3-XXXXX) are circuit boards that interface with the Atmel ATF15xx-DK3 CPLD Development/Programmer Board ...

  • Page 20

    ... The Atmel CPLD Development/Programmer kits includes an Atmel ISP cable; however, other supported ISP cables can also be used. The use of the ISP cable on Atmel devel- opment kit is depending on the device that is selected. The following shows the appropriate ISP cable that can be used for the different voltage families of Atmel CPLDs ...

  • Page 21

    ... Figure 2-10. Atmel ISP Cable Connection to ISP Hardware Board/Circuit Board Figure 2-11 shows the pinout for the 10-pin female header on the Atmel ISP cable. The pinout on the 10-pin male header on the PC board (if used for ISP) must match this pinout ...

  • Page 22

    ... ATF15xx-DK3 Development Kit User Guide CPLD Design Flow Tutorial This tutorial will guide you through a complete VHDL design cycle for the Atmel ATF15xx CPLD. It provides step-by-step procedure to go through each phase of the design cycle from design entry, logic synthesis, device fitting, in-system programming, and finally verifying the design on the Atmel ATF15xx-DK3 CPLD Development/Pro- gramming Board ...

  • Page 23

    CPLD Design Flow Tutorial 3-2 3605B–PLD–05/06 1. Click on the Start > Programs > ProChip icon to launch ProChip Designer. Or double-click on the ProChip icon on the desktop. (1) Click to launch ProChip Designer 2. Click on Project > ...

  • Page 24

    ATF15xx-DK3 Development Kit User Guide 5. Use C:\PROCHIP\DESIGNS\VHDL as the directory of the project. 6. Enter DEV_KIT.APJ as the project filename. The extension of a project file must be .APJ. Note: The name and directory of the design project is ...

  • Page 25

    CPLD Design Flow Tutorial 3-4 3605B–PLD–05/06 8. Select VHDL - Mentor Graphics as the software tool for this design flow. (8) Select the design flow ProChip Designer V4.0 with software patch level 1 and later version supports the follow- ing ...

  • Page 26

    ATF15xx-DK3 Development Kit User Guide On the other hand, users can select Add more parts to include more parts to the cur- rent project directory. (9) Select Done with parts 10. Click the Finish button to finish the New Project ...

  • Page 27

    CPLD Design Flow Tutorial 3-6 3605B–PLD–05/06 11. Click on the ATF1502BE-7AU44 device icon to view the Design Flow window. Project Sources window Message window Project File window Information dialog box (11) Click on the device icon Design Flow window ATF15xx-DK3 ...

  • Page 28

    ... This VHDL design is available at the end of this document. The F02_44TQFP.VHD file is a VHDL design that uses two 7-segment displays and the built-in oscillator on the Atmel ATF15xx-DK3 CPLD Development/Programmer Board to generate two scrolling “0” characters. This design will also pass the states of the I/O push-button switches (SW1-SW4) to the LEDs at LED1-LED4 on the ATF15xx-DK3 CPLD Development/Programmer Board ...

  • Page 29

    ... Precision tool will produce an EDIF output file (with .EDF extension). An EDIF file contains the netlist of the optimized and minimized logic equa- tions. We now need to map this netlist into a specific Atmel CPLD architecture using the Atmel Fitter. (1) Open the Logic ...

  • Page 30

    ... Please review the Global Device Parameters and Pin/Node Options as well. The help files also show the Device Pin_Node lists for each of the Atmel CPLDs. 2. Make sure the JTAG box is checked. This enables the JTAG port for ISP programming ...

  • Page 31

    ... FIT1502 completed in 0.00 seconds In this step of the tutorial, you will program an ATF1502BE 44-pin TQFP device on the Atmel ATF15xx-DK3 CPLD Development/Programmer Board through ISP. Then you will be able to verify the design by observing the four 7-segment displays and four LEDs on the CPLD Development/Programmer Board. ...

  • Page 32

    ... To create a new chain file, the ATMISP Software first needs to be launched either through the Program Chip button in the ProChip Designer window, the ATMISP desktop icon or the Start > Programs > Atmel-ISP menu. Note: If ATMISP is launched through ProChip Designer, then the appropriate chain ( ...

  • Page 33

    ... The next step requires you to setup the Atmel ATF15xx-DK3 CPLD Development/Pro- grammer Board to program the ATF1502BE-7AU44 through the CPLD ISP cable. 7. Connect the DB25 side of the Atmel CPLD ISP MV cable (Revision 6) to the PC’s parallel port and the 10-pin header side of the cable to the Atmel ATF15xx-DK3 CPLD Development Board as shown Figure 2-10 on page 2-14 ...

  • Page 34

    ... Board. If you do not see above message after programming of the device, please review the troubleshooting guide and FAQs from the Atmel-ISP software to debug the problem. After successfully programming the ATF1502BE with the F02_144TQFP.JED file, the first and fourth 7-segment LED displays should show two rotating “0” characters. In ...

  • Page 35

    ATF15xx-DK3 Development Kit User Guide Schematic Diagrams and VHDL File Section 4 4-1 3605B–PLD–05/06 ...

  • Page 36

    Schematic Diagrams and VHDL File Figure 4-1. ATF15xx-D3 Development/Programmer Board Schematic Diagram DOT DOT4 Vc2 Vc1 DOT DOT3 Vc2 Vc1 DOT DOT2 Vc2 Vc1 DOT DOT1 Vc2 Vc1 4-2 3605B–PLD–05/06 LED8 LED7 LED6 LED5 LED4 LED3 LED2 LED1 g D4G ...

  • Page 37

    Figure 4-2. 44-pin TQFP Socket Adapter Board Schematic Diagram ATF15xx-DK3 Development Kit User Guide I/O I/O 22 PIN34 34 GCLK3 I/O 21 PIN35 35 GND I/O GND 36 GCLK1 20 I/O PIN37 37 OE1 19 I/O PIN38 38 18 GCLR ...

  • Page 38

    Schematic Diagrams and VHDL File Figure 4-3. 44-pin PLCC Socket Adapter Board Schematic Diagram 4-4 3605B–PLD–05/06 I/O I/O PIN40 40 28 GCLK3 I/O PIN41 41 GND 27 I/O 26 GND 42 GCLK1 I/O PIN43 43 OE1 25 I/O 24 PIN44 ...

  • Page 39

    Figure 4-4. 84-pin PLCC Socket Adapter Board Schematic Diagram ATF15xx-DK3 Development Kit User Guide I/O PIN75 75 I/O PIN76 76 I/O PIN77 77 VCC_IO VCCIO 78 I/O PIN79 79 I/O PIN80 80 I/O PIN81 81 GND GND 82 INPUT/GCLK1 PIN83 ...

  • Page 40

    Schematic Diagrams and VHDL File Figure 4-5. 100-pin TQFP Socket Adapter Board Schematic Diagram 4-6 3605B–PLD–05/06 I/O PIN76 76 I/On PIN77 77 I/O PIN78 78 I/On PIN79 79 I/O PIN80 80 I/O PIN81 81 VCCIO VCCIO 82 I/O PIN83 83 ...

  • Page 41

    Library Declaration ------------------------------------------------------------------------------------ library IEEE; use IEEE.STD_LOGIC_1164.all, IEEE.NUMERIC_STD.all; ------------------------------------------------------------------------------------ -- Entity Declaration ------------------------------------------------------------------------------------ entity f02_44TQFP is port ( GCLK1 : in std_logic; GCLK2 : in std_logic; GCLR : in std_logic std_logic_vector(8 downto 5);-- Switches DSP1 ...

  • Page 42

    Schematic Diagrams and VHDL File begin iCLK <= GCLK1 or GCLK2; ------------------------------------------------------------------------------------ -- Frequency Divider ------------------------------------------------------------------------------------ FREQ_DIV1 : process (iCLK,GCLR) begin if (GCLR = '0') then CNT1 <= (others => '0'); elsif (rising_edge(iCLK)) then CNT1 <= CNT1 + 1; end ...

  • Page 43

    DSP4(1) <= DSP4(0); DSP4(2) <= DSP4(1); DSP4(3) <= DSP4(2); DSP4(4) <= DSP4(3); DSP4(5) <= DSP4(4); end if; end process; end architecture LOGIC; ATF15xx-DK3 Development Kit User Guide Schematic Diagrams and VHDL File 4-9 3605B–PLD–05/06 ...

  • Page 44

    ... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...