MCP2515DM-PCTL Microchip Technology, MCP2515DM-PCTL Datasheet
MCP2515DM-PCTL
Specifications of MCP2515DM-PCTL
Related parts for MCP2515DM-PCTL
MCP2515DM-PCTL Summary of contents
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... Temperature ranges supported: - Industrial (I): -40°C to +85°C - Extended (E): -40°C to +125°C © 2010 Microchip Technology Inc. MCP2515 Description Microchip Technology’s MCP2515 is a stand-alone Controller Area Network (CAN) implements the CAN specification, version 2.0B capable of transmitting and receiving both standard and extended data and remote frames ...
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... MCP2515 NOTES: DS21801F-page 2 © 2010 Microchip Technology Inc. ...
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... TXCAN OSC1 Timing OSC2 Generation CLKOUT © 2010 Microchip Technology Inc. 1.2 Control Logic The control logic block controls the setup and operation of the MCP2515 by interfacing to the other blocks in order to pass information and control. Interrupt pins are provided to allow greater system flexibility ...
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... General purpose digital input. 100 kΩ internal pull- General purpose digital input. 100 kΩ internal pull- — External clock input — General purpose digital output General purpose digital output — — — — — — — — © 2010 Microchip Technology Inc. ...
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... FIGURE 1-3: CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM BUFFERS TXB0 TXB1 Message Queue Control Transmit Byte Sequencer PROTOCOL ENGINE {Transmit<5:0>, Receive<8:0>} Transmit Logic TX © 2010 Microchip Technology Inc. Figure 1-3 Acceptance Mask A RXM0 TXB2 c c Acceptance Filter e RXF0 p Acceptance Filter t RXF1 ...
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... The programming of the BTL depends on the baud rate and external physical delay times. SAM StuffReg<5:0> Comparator Shift<14:0> (Transmit<5:0>, Receive<7:0>) Transmit<7:0> TrmData<7:0> TX Transmit Logic REC Receive Error Counter TEC Transmit ErrPas Error Counter BusOff Protocol SOF FSM Rec/Trm Addr. © 2010 Microchip Technology Inc. ...
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... CAN frame (11-bit identifier), the standard © 2010 Microchip Technology Inc. CAN frame will win arbitration due to the assertion of a dominant lDE bit. Also, the SRR bit in an extended ...
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... Intermission. This allows nodes time for internal processing before the start of the next message frame. After the intermission, the bus line remains in the recessive state (bus idle) until the next transmission starts. © 2010 Microchip Technology Inc. condition. ...
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... FIGURE 2-1: STANDARD DATA FRAME © 2010 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 Bit Reserved IDE RTR ID0 ID3 10 ID Start-of-Frame MCP2515 DS21801F-page 9 ...
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... MCP2515 FIGURE 2-2: EXTENDED DATA FRAME DS21801F-page 10 Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 bits Reserved RB1 RTR EID0 EID17 IDE SRR ID0 ID3 ID10 Start-Of-Frame © 2010 Microchip Technology Inc. ...
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... FIGURE 2-3: REMOTE FRAME © 2010 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 bits Reserved RB1 RTR EID0 EID17 IDE SRR ID0 ID3 ID10 Start-Of-Frame MCP2515 DS21801F-page 11 ...
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... MCP2515 FIGURE 2-4: ACTIVE ERROR FRAME Start-Of-Frame DS21801F-page 12 DLC0 DLC3 RB0 Bit Reserved IDE RTR ID0 ID3 10 ID © 2010 Microchip Technology Inc. ...
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... FIGURE 2-5: OVERLOAD FRAME © 2010 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 IDE RTR ID0 10 ID Start-Of-Frame MCP2515 DS21801F-page 13 ...
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... MCP2515 NOTES: DS21801F-page 14 © 2010 Microchip Technology Inc. ...
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... TXBnCTRL.TXP<1:0> for a particular message buffer is set to 11, that buffer has the highest possible priority. If TXBnCTRL.TXP<1:0> for a particular message buf- fer is 00, that buffer has the lowest possible priority. © 2010 Microchip Technology Inc. 3.3 Initiating Transmission In order to initiate message transmission, the TXBnCTRL ...
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... If the message does not successfully complete transmission (i.e., lost arbitration or was interrupted by an error frame), it will then be aborted. 2: When one-shot mode is enabled, if the message is interrupted due to an error frame or loss of arbitration, TXBnCTRL.ABTF bit will set. © 2010 Microchip Technology Inc. associated the ...
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... CANTINF.TXnIF The CANINTE.TXnIE bit determines if an interrupt should be generated when a message is successfully transmitted. GOTO START © 2010 Microchip Technology Inc. Start The message transmission sequence begins when the device determines that the TXBnCTRL.TXREQ for any of the transmit registers has been set. ...
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... Highest Message Priority 10 = High Intermediate Message Priority 01 = Low Intermediate Message Priority 00 = Lowest Message Priority DS21801F-page 18 R-0 R/W-0 U-0 TXERR TXREQ — Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 TXP1 TXP0 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... SID8 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 SID: Standard Identifier bits <10:3> © 2010 Microchip Technology Inc. R-x R-x R/W-0 B1RTS B0RTS B2RTSM U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-x ...
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... R/W-x R/W-x R/W-x EID4 EID3 EID2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-x R/W-x EID17 EID16 bit Bit is unknown R/W-x R/W-x EID9 EID8 bit Bit is unknown R/W-x R/W-x EID1 EID0 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... TXBnDm5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 TXBnDm7:TXBnDm0: Transmit Buffer n Data Field Bytes m © 2010 Microchip Technology Inc. R/W-x R/W-x R/W-x — DLC3 DLC2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared ...
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... MCP2515 NOTES: DS21801F-page 22 © 2010 Microchip Technology Inc. ...
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... In addition, the associated RXnBF pin will drive low if configured as a receive buffer full pin. See Section 4.4 “RX0BF and RX1BF Pins” for details. © 2010 Microchip Technology Inc. 4.2 Receive Priority RXB0, the higher priority buffer, has one mask and two message acceptance filters associated with it ...
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... RXBnBF pin will go low. When the CANINTF.RXnIF bit is cleared by the MCU, the corresponding interrupt pin will go to the logic-high state until the next message is loaded into the receive buffer. START-OF-FRAME BIT Sample Point Expected Sample Point ID BIT BUS IDLE © 2010 Microchip Technology Inc. ...
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... RXF0 and RXF2, the match will be for RXF0 and the message will be moved into RXB0 © 2010 Microchip Technology Inc. TABLE 4-1: BnBFE BnBFM BnBFS Acceptance Mask Acceptance Filter Acceptance Mask ...
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... Set RXBF1 0 Pin = Pin = Meets Yes a filter criteria for RXB1 Start CANINTF.RX1IF = ? Yes Move message into RXB1 Set CANINTF.RX1IF = 1 Set RXB0CTRL.FILHIT <2:0> according to which filter criteria was met Yes 1 CANINTE.RX1IE = ? No Are Yes 1 BFPCTRL.B1BFM = and 0 1 BF1CTRL.B1BFE = ? No © 2010 Microchip Technology Inc. ...
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... FILHIT: Filter Hit bit - indicates which acceptance filter enabled reception of message 1 = Acceptance Filter 1 (RXF1 Acceptance Filter 0 (RXF0) Note rollover from RXB0 to RXB1 occurs, the FILHIT bit will reflect the filter that accepted the message that rolled over. © 2010 Microchip Technology Inc. U-0 R-0 R/W-0 — RXRTR BUKT U = Unimplemented bit, read as ‘ ...
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... Acceptance Filter 1 (RXF1) (Only if BUKT bit set in RXB0CTRL) Acceptance Filter 0 (RXF0) (Only if BUKT bit set in RXB0CTRL) 000 = DS21801F-page 28 U-0 R-0 R-0 — RXRTR FILHIT2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared © 2010 Microchip Technology Inc. R-0 R-0 FILHIT1 FILHIT0 bit Bit is unknown ...
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... W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 SID: Standard Identifier bits <10:3> These bits contain the eight most significant bits of the Standard Identifier for the received message © 2010 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 B0BFS B1BFE B0BFE U = Unimplemented bit, read as ‘ ...
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... U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R-x R-x R-x EID12 EID11 EID10 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R-x R-x EID17 EID16 bit Bit is unknown R-x R-x EID9 EID8 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... R = Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 RBnD7:RBnD0: Receive Buffer n Data Field Bytes m Eight bytes containing the data bytes for the received message © 2010 Microchip Technology Inc. R-x R-x R-x EID4 EID3 EID2 U = Unimplemented bit, read as ‘0’ ...
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... Extended Frame ID0 EID17 Standard Data Frame ID0 Data Byte 0 * 16-bit data filtering * FILTER/MASK TRUTH TABLE Message Accept or Filter Bit n Identifier Reject bit n bit Accept X X Accept 0 0 Reject 0 1 Reject 1 0 Accept 1 1 EID0 Data Byte 1 © 2010 Microchip Technology Inc. ...
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... RXFn Message Assembly Buffer Identifier © 2010 Microchip Technology Inc. If the BUKT bit is clear, there are six codes corresponding to the six filters. If the BUKT bit is set, there are six codes corresponding to the six filters, plus two additional codes corresponding to RXF0 and RXF1 filters that roll over into RXB1 ...
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... U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared U-0 R/W-x U-0 — EXIDE — Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-x R/W-x SID4 SID3 bit Bit is unknown R/W-x R/W-x EID17 EID16 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... Value at POR ‘1’ = Bit is set bit 7-0 SID: Standard Identifier Mask bits <10:3> These bits hold the mask bits to be applied to bits <10:3> of the Standard Identifier portion of a received message © 2010 Microchip Technology Inc. R/W-x R/W-x R/W-x EID12 EID11 EID10 U = Unimplemented bit, read as ‘ ...
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... R/W-0 R/W-0 R/W-0 EID4 EID3 EID2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 EID17 EID16 bit Bit is unknown R/W-0 R/W-0 EID9 EID8 bit Bit is unknown R/W-0 R/W-0 EID1 EID0 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... DPLL. FIGURE 5-1: CAN BIT TIME SEGMENTS SyncSeg PropSeg © 2010 Microchip Technology Inc. 5.1 The CAN Bit TIme All devices on the CAN bus must use the same bit rate. However, all devices are not required to have the same master oscillator clock frequency ...
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... Baud Rate Prescaler (BRP). This is illustrated in the following equation: EQUATION 5-2: ⋅ ⋅ BRP T OSC Where: BRP equals the configuration as shown in Register 5-1. PS2 PS1 (Programmable) (Programmable) CAN Bit Time © 2010 Microchip Technology Inc. = 2TQ with the transmitted ⋅ 2 BRP = ------------------ - F OSC ...
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... SAMPLE POINT (TQ is added to PS1) • e < the edge lies after the SAMPLE POINT of the previous bit (TQ is subtracted from PS2) © 2010 Microchip Technology Inc. 5.2.2.2 No Phase Error ( the magnitude of the phase error is less than or equal ...
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... Nominal Bit Time (NBT) No Resynchronization ( PhaseSeg1 (PS1) Nominal Bit Time (NBT) Actual Bit Time PhaseSeg1 (PS1) Sample Point Nominal Bit Time (NBT) Actual Bit Time PhaseSeg2 (PS2) SJW (PS2) PhaseSeg2 (PS2) SJW (PS2) Sample Point PhaseSeg2 (PS2) SJW (PS2) © 2010 Microchip Technology Inc. ...
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... For the full bus speed range of the CAN protocol, a quartz oscillator is required. A maximum node-to-node oscillator variation of 1.7% is allowed. © 2010 Microchip Technology Inc. 5.5 Bit Timing Configuration Registers The configuration registers (CNF1, CNF2, CNF3) control the bit timing for the CAN bus interface ...
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... U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 R/W-0 PHSEG11 PHSEG10 PRSEG2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared ) Q R/W-0 R/W-0 BRP1 BRP0 bit Bit is unknown R/W-0 R/W-0 PRSEG1 PRSEG0 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... Wake-up filter disabled bit 5-3 Unimplemented: Reads as ‘0’ bit 2-0 PHSEG2: PS2 Length bits<2:0> (PHSEG2 + Minimum valid setting for PS2 © 2010 Microchip Technology Inc. U-0 U-0 R/W-0 — — PHSEG22 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared ...
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... MCP2515 NOTES: DS21801F-page 44 © 2010 Microchip Technology Inc. ...
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... A stuff error occurs and an error frame is generated. The message is repeated. © 2010 Microchip Technology Inc. MCP2515 6.6 Error States Detected errors are made known to all other nodes via error frames ...
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... U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R-0 R-0 R-0 REC4 REC3 REC2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R-0 R-0 TEC1 TEC0 bit Bit is unknown R-0 R-0 REC1 REC0 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... Reset when REC is less than 96 bit 0 EWARN: Error Warning Flag bit - Set when TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = 1) Reset when both REC and TEC are less than 96 - © 2010 Microchip Technology Inc. R-0 R-0 R-0 TXEP RXEP TXWAR U = Unimplemented bit, read as ‘ ...
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... MCP2515 NOTES: DS21801F-page 48 © 2010 Microchip Technology Inc. ...
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... ERR•WAK•TX0•TX1•TX2•RX0 110 ERR•WAK•TX0•TX1•TX2•RX0•RX1 111 Note: ERR is associated with CANINTE,ERRIE. © 2010 Microchip Technology Inc. 7.2 Transmit Interrupt When the (CANINTE.TXnIE = 1), an interrupt will be generated on the INT pin once the associated transmit buffer becomes empty and is ready to be loaded with a new message ...
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... MCU until the interrupt condition is removed. R/W-0 R/W-0 R/W-0 TX2IE TX1IE TX0IE U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 RX1IE RX0IE bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... RX1IF: Receive Buffer 1 Full Interrupt Flag bit 1 = Interrupt pending (must be cleared by MCU to reset interrupt condition interrupt pending bit 0 RX0IF: Receive Buffer 0 Full Interrupt Flag bit 1 = Interrupt pending (must be cleared by MCU to reset interrupt condition interrupt pending © 2010 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 TX2IF TX1IF TX0IF U = Unimplemented bit, read as ‘ ...
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... MCP2515 NOTES: DS21801F-page 52 © 2010 Microchip Technology Inc. ...
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... Clock from external system Note 1: A resistor to ground may be used to reduce system noise. This may increase system current. 2: Duty cycle restrictions must be observed (see © 2010 Microchip Technology Inc. 8.2 CLKOUT Pin The CLKOUT pin is provided to the system designer for use as the main system clock clock input for other devices in the system ...
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... CAPACITOR SELECTION FOR CRYSTAL OSCILLATOR Typical Capacitor Crystal Values Tested: (2) Freq MHz MHz MHz and temperature range for the (3) Crystals Used : 4.0 MHz 8.0 MHz 20.0 MHz may be required to avoid overdriving S and temperature range that is DD © 2010 Microchip Technology Inc. ...
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... V DD Note 1: The diode D helps discharge the capacitor quickly when kΩ kΩ will limit any current flowing into RESET from external capacitor C, in the event of RESET pin breakdown due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). © 2010 Microchip Technology Inc. reaches (1) ...
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... MCP2515 NOTES: DS21801F-page 56 © 2010 Microchip Technology Inc. ...
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... Sleep mode and use the MCP2515 to wake it up upon detecting activity on the bus. © 2010 Microchip Technology Inc. When in Sleep mode, the MCP2515 stops its internal oscillator. The MCP2515 will wake up when bus activity occurs or when the MCU sets, via the SPI interface, the CANINTF.WAKIF bit to ‘ ...
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... This is also the only mode in which the MCP2515 will transmit messages over the CAN bus. R/W-0 R/W-0 R/W-1 ABAT OSM CLKEN U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 R/W-1 CLKPRE1 CLKPRE0 bit Bit is unknown © 2010 Microchip Technology Inc. ...
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... Wake-up Interrupt 011 = TXB0 Interrupt 100 = TXB1 Interrupt 101 = TXB2 Interrupt 110 = RXB0 Interrupt 111 = RXB1 Interrupt bit 0 Unimplemented: Read as ‘0’ © 2010 Microchip Technology Inc. U-0 R-0 R-0 — ICOD2 ICOD1 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared ...
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... MCP2515 NOTES: DS21801F-page 60 © 2010 Microchip Technology Inc. ...
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... RXM1 RXB1CTRL 70 — RSM1 © 2010 Microchip Technology Inc. reading and writing of data. Some specific control and status registers allow individual bit modification using the SPI Bit Modify command. The registers that allow this command are shown as shaded locations in Table 11-1 ...
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... MCP2515 NOTES: DS21801F-page 62 © 2010 Microchip Technology Inc. ...
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... Once the command byte is sent, the controller clocks out the data at the address location the same as © 2010 Microchip Technology Inc. the Read instruction (i.e., sequential reads are possible). This instruction further reduces the SPI overhead by automatically clearing the associated receive flag (CANINTF ...
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... Note: Not all registers can be bit-modified with this command. Executing this command on registers that are not bit- modifiable will force the mask to FFh. See the register map in Section 11.0 “Register Map” for a list of the registers that apply. © 2010 Microchip Technology Inc. Figure 12-7). 1 ...
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... SCK instruction high-impedance SO FIGURE 12-3: READ RX BUFFER INSTRUCTION SCK instruction high-impedance SO FIGURE 12-4: BYTE WRITE INSTRUCTION SCK instruction © 2010 Microchip Technology Inc address byte don’t care 0 data out address byte high-impedance MCP2515 don’t care data out Address Points to ...
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... T2 T0 high-impedance mask byte address byte high-impedance Address Points to Addr buffer 0, Start at 0x31 TXB0SIDH buffer 0, Start at 0x36 TXB0D0 buffer 1, Start at 0x41 TXB1SIDH buffer 1, Start at 0x46 TXB1D0 buffer 2, Start at 0x51 TXB2SIDH buffer 2, Start at 0x56 TXB2D0 data byte © 2010 Microchip Technology Inc. ...
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... SI high-impedance Received Message message 0 1 Message in RXB0 0 0 Message in RXB1 1 1 Messages in both buffers* 1 CANINTF.RXnIF bits are mapped to bits 7 and 6. * Buffer 0 has higher priority, therefore, RXB0 status is reflected in bits 4:0. © 2010 Microchip Technology Inc don’t care 0 data out ...
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... MCP2515 FIGURE 12-10: SPI INPUT TIMING CS 1 Mode 1,1 SCK Mode 0 MSB in SO FIGURE 12-11: SPI OUTPUT TIMING SCK 12 SO MSB out SI DS21801F-page high-impedance 13 don’t care LSB in 2 Mode 1,1 Mode 0,0 14 LSB out © 2010 Microchip Technology Inc. ...
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... Exposure to maximum rating conditions for extended periods may affect device reliability. © 2010 Microchip Technology Inc. MCP2515 +1.0V ...
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... µA — 25°C, f AMB (Note 1) DD — 5.5V MHz Open CLK — 5 µA CS, TXnRTS = — 8 µA CS, TXnRTS = © 2010 Microchip Technology Inc 2. 4.5V to 5.5V DD Conditions = 1.0 MHz MHz, OSC , Inputs tied -40°C +85° Inputs tied -40° ...
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... Characteristic No. Wake-up Noise Filter T WF TABLE 13-4: RESET AC CHARACTERISTICS RESET AC Characteristics Param. Sym Characteristic No. RESET Pin Low Time trl © 2010 Microchip Technology Inc. Industrial (I -40°C to +85°C AMB Extended (E -40°C to +125°C AMB Min Max Units 1 40 MHz 4 ...
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... Measured from 0.3 V (Note 1) — Measured from 0.7 V (Note 1) — 100 ns Note 1 — Note 1 OSC — Measured from CAN bit sample OSC 0.5 T point. Device is a receiver. Q CNF1.BRP<5:0> (Note 2) 16 sample point 15 © 2010 Microchip Technology Inc 2. 4.5V to 5.5V DD Conditions ...
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... CLE 12 T Output Valid from Clock Low Output Hold Time Output Disable Time DIS Note 1: This parameter is not 100% tested. © 2010 Microchip Technology Inc. Industrial (I -40°C to +85°C AMB Extended (E -40°C to +125°C AMB Min Max Units — 10 ...
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... MCP2515 NOTES: DS21801F-page 74 © 2010 Microchip Technology Inc. ...
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... Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2010 Microchip Technology Inc. MCP2515 Example: e MCP2515-I/P^^ ...
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... MCP2515 N NOTE DS21801F-page © 2010 Microchip Technology Inc. ...
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... D N NOTE © 2010 Microchip Technology Inc α φ A2 β MCP2515 c DS21801F-page 77 ...
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... MCP2515 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21801F-page 78 © 2010 Microchip Technology Inc. ...
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... D N NOTE © 2010 Microchip Technology Inc MCP2515 φ L DS21801F-page 79 ...
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... MCP2515 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21801F-page 80 © 2010 Microchip Technology Inc. ...
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... D TOP VIEW A3 © 2010 Microchip Technology Inc. EXPOSED PAD NOTE 1 BOTTOM VIEW A A1 MCP2515 DS21801F-page 81 ...
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... MCP2515 DS21801F-page 82 © 2010 Microchip Technology Inc. ...
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... Section 12.0 “SPI Interface”, Table - Changed supply voltage minimum to 2.7V. - Internal Capacitance: Changed 0V. - Standby Current (Sleep mode): Split specification into -40°C to +85°C and -40°C to +125°C. Revision A (May 2003) • Original Release of this Document. © 2010 Microchip Technology Inc. 12-1: condition MCP2515 DS21801F-page 83 ...
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... MCP2515 NOTES: DS21801F-page 84 © 2010 Microchip Technology Inc. ...
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... Package P = Plastic DIP (300 mil Body), 18-Lead SO = Plastic SOIC (300 mil Body), 18-Lead ST = TSSOP, (4.4 mm Body), 20-Lead ML = Plastic QFN, (4x4 mm Body), 20-Lead © 2007 Microchip Technology Inc. MCP2515 . Examples: a) MCP2515-E/P: Extended Temperature, 18LD PDIP package. b) MCP2515-I/P: Industrial Temperature, 18LD PDIP package. c) MCP2515-E/SO: Extended Temperature, 18LD SOIC package ...
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... MCP2515 NOTES: DS21801F-page 86 © 2007 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 08/04/10 ...