CP2103EK Silicon Laboratories Inc, CP2103EK Datasheet - Page 13

KIT EVAL FOR CP2103 USB TO UART

CP2103EK

Manufacturer Part Number
CP2103EK
Description
KIT EVAL FOR CP2103 USB TO UART
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2103EK

Main Purpose
Interface, USB 2.0 to UART (RS232) Bridge
Embedded
No
Utilized Ic / Part
CP2103
Primary Attributes
Full Speed, 300 bps to 1 Mbps
Secondary Attributes
Software, Connector Provides Direct Access to UART Signals
Processor To Be Evaluated
CP2103
Interface Type
RS-232, USB
Silicon Manufacturer
Silicon Labs
Silicon Core Number
CP2103
Kit Contents
Evaluation Board, RS-232 Cable, USB Cable And Driver CD
Development Tool Type
Hardware / Software - Eval/Demo Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1163

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2103EK
Manufacturer:
Silicon Labs
Quantity:
135
4. USB Function Controller and Transceiver
The universal serial bus function controller in the CP2103 is a USB 2.0 compliant full-speed device with integrated
transceiver and on-chip matching and pull-up resistors. The USB function controller manages all data transfers
between the USB and the UART as well as command requests generated by the USB host controller and
commands for controlling the function of the UART.
The USB Suspend and Resume signals are supported for power management of both the CP2103 device as well
as external circuitry. The CP2103 will enter Suspend mode when Suspend signaling is detected on the bus. Upon
entering Suspend mode, the CP2103 asserts the SUSPEND and SUSPEND signals. SUSPEND and SUSPEND
are also asserted after a CP2103 reset until device configuration during USB Enumeration is complete.
The CP2103 exits the Suspend mode when any of the following events occurs: (1) Resume signaling is detected or
generated, (2) a USB Reset signal is detected, or (3) a device reset occurs. Upon exit from Suspend mode, the
SUSPEND and SUSPEND signals are de-asserted.
Both SUSPEND and SUSPEND temporarily float high during a CP2103 reset. If this behavior is undesirable, a
strong pulldown (10 k) can be used to ensure SUSPEND remains low during reset. See Figure 6 for other
recommended options.
CONNECTOR
USB
Option 1: A 4.7 k pull-up resistor can be added to increase noise immunity.
Option 2: A 4.7 µF capacitor can be added if powering other devices from the on-chip regulator.
Option 3: Avalanche transient voltage suppression diodes should be added for ESD protection .
Option 3:
Option 4: 10 k resistor to ground to hold SUSPEND low on initial power on or device reset.
VBUS
GND
D+
D-
1
3
4
Use Littlefuse p/n SP0503BAHT or equivalent.
4.7 F
Option 2
C4
I/O Voltage
D1
0.1 F
D2
1 F
1 F
C1
C2
D3
Option 3
5
7
6
2
8
4
3
Figure 6. Typical Connection Diagram
REGIN
VBUS
GND
VDD
V
D+
D-
IO
CP2103
Rev. 1.0
SUSPEND
SUSPEND
GPIO.0
GPIO.1
GPIO.2
GPIO.3
RST
DCD
DSR
RXD
DTR
TXD
RTS
CTS
RI
9
12
11
1
28
27
26
25
24
23
22
19
18
17
16
4.7 k
10 k
R1
R2
VDD
Option 1
Option 4
CP2103
External RS-232
(to external circuitry
for USB suspend
states)
UART circuitry
transceiver or
Application
External
Circuitry
13

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