EVAL-AD9832EBZ Analog Devices Inc, EVAL-AD9832EBZ Datasheet

BOARD EVAL FOR AD9832

EVAL-AD9832EBZ

Manufacturer Part Number
EVAL-AD9832EBZ
Description
BOARD EVAL FOR AD9832
Manufacturer
Analog Devices Inc
Datasheets

Specifications of EVAL-AD9832EBZ

Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9832
Primary Attributes
10-Bit DAC, 32-Bit Tuning Word Width
Secondary Attributes
25MHz, Graphical User Interface, 2.97 V ~ 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
EVAL-AD9832EB
EVAL-AD9832EB
a
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
3 V/5 V Power Supply
25 MHz Speed
On-Chip SINE Look-Up Table
On-Chip 10-Bit DAC
Serial Loading
Power-Down Option
45 mW Power Consumption
16-Lead TSSOP
APPLICATIONS
DDS Tuning
Digital Demodulation
FSELECT
MCLK
FSELECT
FREQ0 REG
FREQ1 REG
FSYNC
BIT
16-BIT DATA REGISTER
8 MSBs
SYNC
SERIAL REGISTER
DECODE LOGIC
SCLK
SELSRC
MUX
8 LSBs
FUNCTIONAL BLOCK DIAGRAM
DVDD
SDATA
SYNC
PHASE0 REG
PHASE1 REG
PHASE2 REG
PHASE3 REG
DGND
ACCUMULATOR
DEFER REGISTER
(32 BIT)
PHASE
FSELECT/PSEL REGISTER
CONTROL REGISTER
AVDD
MUX
GENERAL DESCRIPTION
The AD9832 is a numerically controlled oscillator employing
a phase accumulator, a sine look-up table and a 10-bit D/A
converter integrated on a single CMOS chip. Modulation
capabilities are provided for phase modulation and frequency
modulation.
Clock rates up to 25 MHz are supported. Frequency accuracy
can be controlled to one part in 4 billion. Modulation is effected
by loading registers through the serial interface.
A power-down bit allows the user to power down the AD9832
when it is not in use, the power consumption being reduced to
5 mW (5 V) or 3 mW (3 V). The part is available in a 16-lead
TSSOP package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
AGND
12
SELSRC
REFERENCE
ON-BOARD
REFOUT
ROM
SIN
SYNC
SYNC
PSEL0
BIT
FS ADJUST
AD9832
World Wide Web Site: http://www.analog.com
PSEL0 PSEL1
FULL-SCALE
CONTROL
10-BIT DAC
PSEL1
REFIN
BIT
Complete DDS
© Analog Devices, Inc., 1999
COMP
IOUT
AD9832
CMOS

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EVAL-AD9832EBZ Summary of contents

Page 1

FEATURES 3 V/5 V Power Supply 25 MHz Speed On-Chip SINE Look-Up Table On-Chip 10-Bit DAC Serial Loading Power-Down Option 45 mW Power Consumption 16-Lead TSSOP APPLICATIONS DDS Tuning Digital Demodulation FSELECT MCLK BIT FSELECT FREQ0 REG FREQ1 REG ...

Page 2

AD9832–SPECIFICATIONS Parameter SIGNAL DAC SPECIFICATIONS Resolution Update Rate (f ) MAX I Full Scale OUT Output Compliance DC Accuracy Integral Nonlinearity Differential Nonlinearity 2 DDS SPECIFICATIONS Dynamic Specifications Signal to Noise Ratio Total Harmonic Distortion Spurious Free Dynamic Range (SFDR) ...

Page 3

TIMING CHARACTERISTICS Limit MIN MAX Parameter (B Version SCLK – ...

Page 4

AD9832 ABSOLUTE MAXIMUM RATINGS +25 C unless otherwise noted) A AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . –0 ...

Page 5

Pin # Mnemonic Function ANALOG SIGNAL AND REFERENCE 1 FS ADJUST Full-Scale Adjust Control. A resistor (R the magnitude of the full-scale DAC current. The relationship between R as follows: 2 REFIN Voltage Reference Input. The AD9832 can be used ...

Page 6

Performance Characteristics AD9832 + + +3. MCLK FREQUENCY – MHz Figure 5. Typical Current Consump- tion vs. MCLK Frequency –40 AVDD = DVDD = ...

Page 7

START 0Hz STOP 12.5MHz RBW 300Hz VBW 1kHz ST 277 SEC Figure 14 MHz 3.1 MHz, MCLK OUT Frequency Word = 1FBE76C9 0 –10 ...

Page 8

AD9832 TERMINOLOGY Integral Nonlinearity This is the maximum deviation of any code from a straight line passing through the endpoints of the transfer function. The end- points of the transfer function are zero scale, a point 0.5 LSB be- low ...

Page 9

Table V. Commands Command Write 16 phase bits (Present 8 Bits + 8 Bits in Defer Register) to Selected PHASE REG Write 8 phase bits to Defer Register. ...

Page 10

AD9832 CIRCUIT DESCRIPTION The AD9832 provides an exciting new level of integration for the RF/Communications system designer. The AD9832 com- bines the Numerical Controlled Oscillator (NCO), SINE Look- Up Table, Frequency and Phase Modulators, and a Digital-to- Analog Converter on ...

Page 11

The first bit is read into the device on the next SCLK falling edge with the remaining bits being read into the device on the subsequent SCLK falling edges. FSYNC frames the 16 bits, therefore, when 16 SCLK falling ...

Page 12

AD9832 WAIT 6 MCLK CYCLES (8 MCLK CYCLES IF SYNC = *6.25*R OUT REFIN CHANGE FSELECT Figure 22. Flow Chart for AD9832 Initialization and Operation INITIALIZATION* CONTROL REGISTER WRITE SET SLEEP RESET = 1 CLR = ...

Page 13

APPLICATIONS The AD9832 contains functions that make it suitable for modu- lation applications. The part can be used to perform simple modulation such as FSK, and more complex modulation schemes such as GMSK and QPSK can also be implemented using ...

Page 14

... To prove that this device will meet the user’s waveform synthe- sis requirements, the user requires only a 3 power supply, an IBM-compatible PC and a spectrum analyzer along with the evaluation board. The evaluation board setup is shown below. The DDS evaluation kit includes a populated, tested AD9832 printed circuit board, along with the software that controls the AD9832 Windows environment ...

Page 15

... Prototyping Area An area is available on the evaluation board for the user to add additional circuits to the evaluation test set. Users may want to build custom analog filters for the output or add buffers and operational amplifiers to be used in the final application ...

Page 16

AD9832 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead Thin Shrink Small Outline Package (TSSOP) (RU-16) 0.201 (5.10) 0.193 (4.90 PIN 1 0.006 (0.15) 0.0433 0.002 (0.05) (1.10) MAX 8 0.0256 0.0118 (0.30) 0 SEATING ...

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