AD9551/PCBZ Analog Devices Inc, AD9551/PCBZ Datasheet - Page 36

• Manufacturer Part Number: AD9551/PCBZ
• Description: BOARD EVAL FOR AD9951
• Manufacturer: Analog Devices Inc

Specifications of AD9551/PCBZ

• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9551
• Primary Attributes: 2 Inputs, 2 Outputs, VCO
• Secondary Attributes: Graphical User Interface, USB Interface
• Silicon Manufacturer: Analog Devices
• Application Sub Type: Clock Generator
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9551
• Kit Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9551
REFA Frequency Control (Register 0x1E to Register 0x25)
Table 29.
Address
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
Bit
7
6
5
4
3
2
[1:0]
[7:0]
[7:0]
[7:4]
[3:0]
[7:2]
[1:0]
7
[6:0]
[7:0]
[7:4]
[3:0]
Bit Name
Enable SPI control of
REFA SDM
Bypass REFA SDM
Enable REFA SDM
Enable REFB
Unused
Disable REF SDM PRBS
Select 19.44 MHz input
mode divider
FRACA
FRACA
FRACA
Unused
NA
Unused
Unused
MODA
MODA
MODA
Unused
Description
Controls REFA frequency division functionality.
0 = REFA frequency division, as defined by the A[3:0] pins (default).
1 = contents of Register 0x1F to Register 0x25 define REFA frequency division via NA,
MODA, and FRACA.
Controls bypassing of the REFA SDM.
0 = allow integer-plus-fractional division (default).
1 = allow only integer division.
Controls REFA SDM enable and hold functionality.
0 = reset REFA SDM and stop its clocks.
1 = REFA SDM enabled (default).
Controls REFB enable and power-down functionality.
0 = power down REFB input receiver (ineffective unless Register 0x1A[1] = 1).
1 = normal operation (default).
Unused.
Controls the PRBS generator for both the REFA and REFB SDMs.
0 = PRBS generator enabled (default).
1 = PRBS generator disabled.
Selects the divider value when the 19.44 MHz input mode is in effect.
00 = 1 (default).
01 = 1.
10 = 2.
11 = 4.
Bits[19:12] of the 20-bit fractional part of the REFA SDM.
Bits[11:4] of the 20-bit fractional part of the REFA SDM.
Bits[3:0] of the 20-bit fractional part of the REFA SDM.
Default is FRACA = 0100 0000 0000 0000 0000 (262,144).
Note that FRACA assumes twos complement format.
Unused.
6-bit integer divide value for the REFA SDM. Default divide value is 16.
Unused.
This bit must be programmed to 0, even though the default value is 1.
Bits[18:12] of the 19-bit modulus of the REFA SDM.
Bits[11:4] of the 19-bit modulus of the REFA SDM.
Bits[3:0] of the 19-bit modulus of the REFA SDM.
Default is MODA = 000 0000 0000 0000 0000.
Unused.
These bits are ineffective unless the A[3:0] pins = 1111 or the B[3:0] pins = 1111.
Rev. B | Page 36 of 40