AD9851/FSPCB Analog Devices Inc, AD9851/FSPCB Datasheet

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AD9851/FSPCB

Manufacturer Part Number
AD9851/FSPCB
Description
BOARD EVAL FOR AD9851/FS
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Datasheet

Specifications of AD9851/FSPCB

Rohs Status
RoHS non-compliant
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Utilized Ic / Part
AD9851/FS
Secondary Attributes
-
Embedded
-
Primary Attributes
-
GENERAL DESCRIPTION
The AD9851 is a highly integrated device that uses advanced
DDS technology, coupled with an internal high speed, high
performance D/A converter, and comparator, to form a digitally
programmable frequency synthesizer and clock generator func-
tion. When referenced to an accurate clock source, the AD9851
generates a stable frequency and phase-programmable digitized
analog output sine wave. This sine wave can be used directly as
a frequency source, or internally converted to a square wave for
agile-clock generator applications. The AD9851’s innovative
high speed DDS core accepts a 32-bit frequency tuning word,
which results in an output tuning resolution of approximately
0.04 Hz with a 180 MHz system clock. The AD9851 contains
a unique 6 REFCLK Multiplier circuit that eliminates the
need for a high speed reference oscillator. The 6 REFCLK
Multiplier has minimal impact on SFDR and phase noise char-
acteristics. The AD9851 provides five bits of programmable
phase modulation resolution to enable phase shifting of its
output in increments of 11.25°.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or oth-
erwise under any patent or patent rights of Analog Devices.Trademarks
and registered trademarks are the property of their respective owners.
FEATURES
180 MHz Clock Rate with Selectable 6 Reference Clock
On-Chip High Performance 10-Bit DAC and High Speed
SFDR >43 dB @ 70 MHz A
32-Bit Frequency Tuning Word
Simplified Control Interface: Parallel or Serial
5-Bit Phase Modulation and Offset Capability
Comparator Jitter <80 ps p-p @ 20 MHz
2.7 V to 5.25 V Single-Supply Operation
Low Power: 555 mW @ 180 MHz
Power-Down Function, 4 mW @ 2.7 V
Ultrasmall 28-Lead SSOP Packaging
APPLICATIONS
Frequency/Phase-Agile Sine Wave Synthesis
Clock Recovery and Locking Circuitry for Digital
Digitally Controlled ADC Encode Generator
Agile Local Oscillator Applications in Communications
Quadrature Oscillator
CW, AM, FM, FSK, MSK Mode Transmitter
Multiplier
Comparator with Hysteresis
Asynchronous Loading Format
Communications
OUT
UPDATE/DATA
The AD9851 contains an internal high speed comparator that
can be configured to accept the (externally) filtered output of the
DAC to generate a low jitter output pulse.
The frequency tuning, control, and phase modulation words are
asynchronously loaded into the AD9851 via a parallel or serial
loading format. The parallel load format consists of five iterative
loads of an 8-bit control word (byte). The first 8-bit byte controls
output phase, 6 REFCLK Multiplier, power-down enable and
loading format; the remaining bytes comprise the 32-bit frequency
tuning word. Serial loading is accomplished via a 40-bit serial data
stream entering through one of the parallel input bus lines. The
AD9851 uses advanced CMOS technology to provide this break-
through level of functionality on just 555 mW of power dissipation
(5 V supply), at the maximum clock rate of 180 MHz.
The AD9851 is available in a space-saving 28-lead SSOP,
surface-mount package that is pin-for-pin compatible with the
popular AD9850 125 MHz DDS. It is specified to operate over
the extended industrial temperature range of –40°C to +85°C
at >3.0 V supply voltage. Below 3.0 V, the specifications apply
over the commercial temperature range of 0°C to 85°C.
One Technology Way, P .O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
FREQUENCY
WORD LOAD
REGISTER
CLOCK IN
MASTER
CLOCK
RESET
RESET
REF
FUNCTIONAL BLOCK DIAGRAM
SERIAL
LOAD
AND CONTROL DATA INPUT
40 LOADS
MULTIPLIER
6 REFCLK
TUNING
DATA INPUT REGISTER
1 BIT 
32-BIT
WORD
FREQUENCY/PHASE
FREQUENCY, PHASE
DATA REGISTER
DDS/DAC Synthesizer
+V
© 2004 Analog Devices, Inc. All rights reserved.
S
PARALLEL
HIGH SPEED
AD9851
CONTROL
8 BITS 
5 LOADS
WORDS
LOAD
PHASE
AND
DDS
CMOS 180 MHz
GND
COMPARATOR
10-BIT
DAC
AD9851
www.analog.com
ANALOG
OUT
ANALOG
IN
CLOCK OUT
CLOCK OUT
DAC R
SET

Related parts for AD9851/FSPCB

AD9851/FSPCB Summary of contents

Page 1

FEATURES 180 MHz Clock Rate with Selectable 6 Reference Clock Multiplier On-Chip High Performance 10-Bit DAC and High Speed Comparator with Hysteresis SFDR > MHz A OUT 32-Bit Frequency Tuning Word Simplified Control Interface: Parallel or Serial ...

Page 2

AD9851–SPECIFICATIONS P arameter CLOCK INPUT CHARACTERISTICS Frequency Range (6 REFCLK Multiplier Disabled)  5.0 V Supply 3.3 V Supply 2.7 V Supply Frequency Range (6 REFCLK Multiplier Enabled)  5.0 V Supply 3.3 V Supply 2.7 V Supply Duty Cycle ...

Page 3

Parameter 4 TIMING CHARACTERISTICS (W_CLK Min Pulse Width High/Low) (W_CLK Min Pulse Width High/Low (Data to W_CLK Setup and Hold Times (FQ_UD Min Pulse Width ...

Page 4

... AD9851BRSRL –40°C to +85°C AD9851/CGPCB AD9851/FSPCB CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9851 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...

Page 5

Pin No. Mnemonic Function 4–1, D0–D7 8-Bit Data Input. The data port for loading the 32-bit frequency and 8-bit phase/control words MSB; 28– LSB. D7, Pin 25, also serves as the input pin for 40-bit serial ...

Page 6

AD9851–Typical Performance Characteristics 0 RBW = 5kHz –10 VBW = 5kHz SWT = 7.2s –20 RF ATT = 20dB REF LVL = –7dBm –30 –40 –50 –60 –70 –80 –90 –100 0Hz 7.2MHz/ START TPC 1. Wideband ( ...

Page 7

Tek Run 4.00GS/s Sample [ ] T  : 208ps @ : 1.940ns 1 M 12.5ns Ch 1 Ch1 200mV D 200ps Runs After TPC 7. Typical CMOS comparator p-p output jitter with the AD9851 configured as a clock generator, ...

Page 8

AD9851 –120 AD9851 RESIDUAL PHASE NOISE –125 –130 –135 –140 –145 –150 –155 100 1k FREQUENCY OFFSET – Hz TPC 11. Output Residual Phase Noise (5.2 MHz A REFCLK Multiplier Disabled, System Clock = 180 MHz, Ref- erence Clock = ...

Page 9

MAXIMUM DAC I OUT TPC 17. Effect of DAC maximum output current on wideband ( MHz) SFDR at three representa- tive DAC output frequencies: 1.1 MHz, ...

Page 10

... SINE WAVE USING PASSIVE AVERAGING CIRCUIT PHASE LOOP VCO COMPARATOR FILTER REF CLK IN AD9851 DDS PROGRAMMABLE DIVIDE-BY-N FUNCTION 32 (WHERE TUNING WORD) TUNING WORD AD9851/FSPCB 8-BIT EVALUATION ADSP-2181 DATA BOARD BUS BUS DSP INPUT/ AD9851 OUTPUT DSP DECODE DDS LOGIC REF AD1847 ...

Page 11

W CLK #1 W CLK # MICROPROCESSOR OR 8-BIT DATA BUS MICROCONTROLLER RESET RESET W CLK #2 W CLK #2 Figure 7. Application Showing Synchronization of Two AD9851 DDSs to Form a Quadrature Oscillator After a ...

Page 12

AD9851 REFERENCE CLOCK N PHASE ACCUMULATOR TUNING WORD SPECIFIES OUTPUT FREQUENCY AS A FRACTION OF REF CLOCK FREQUENCY Figure 11. Basic DDS Block Diagram and Signal Flow of AD9851 F OUT 0Hz 20MHz (DC) Figure 12. Output Spectrum of a ...

Page 13

In the example shown in Figure 12, the system clock is 100 MHz and the output frequency is set to 20 MHz. As can be seen, the aliased images are very prominent and of a relatively high energy level as ...

Page 14

AD9851 the factory test mode. Exit from serial mode to parallel mode is only possible using the RESET command. The function assignments of the data and control words are shown in Tables I and III; the detailed timing sequence for ...

Page 15

SYSCLK RESET A OUT Note: The timing diagram above shows the minimal amount of reset time needed before writing to the device. However, the master reset does not have to be synchronous to the SYSCLK if the minimal time is ...

Page 16

AD9851 DATA CLK CLK CYCLES 40 CLK CYCLES Figure 19. Serial Load Frequency/Phase Update Sequence Table III. 40-Bit Serial Load Word Functional Assignment W0 Freq–b0 (LSB) W1 Freq–b1 W2 Freq–b2 ...

Page 17

... Printer port, 3.5-in floppy drive, mouse, and Centronics com- patible printer cable voltage supply Crystal clock oscillator or high frequency signal generator (sine wave output) with dc offset capability AD9851 Evaluation Board Software disk and AD9851/FSPCB or AD9851/CGPCB Evaluation Board Setup Copy the contents of the AD9851 disk onto the host PCs hard drive ...

Page 18

... Hz, 0° phase, parallel programming mode. The output from the DAC IOUT should voltage equal to the full-scale output of the AD9851 (1 V for the AD9851/CGPCB and 0.5 V for the AD9851/FSPCB), while the DAC IOUTB should for both evaluation boards. RESET should always be the first command to the AD9851 following power-up. ...

Page 19

... STROBE 14 FFQUD 74HCT574 RRESET WWCLK FFQUD RRESET WWCLK 1D 32 CHECK STROBE 36 STROBE + 10F R3 2.2k STROBE WWCLK REV AD9851/FSPCB 12 FREQUENCY 8Q D0 SYNTHESIZER EVALUATION BOARD AD9851 PGND GND PVCC 6 W CLK WCLK FQUD 8 CLKIN REFCLOCK 9 AGND GND AVDD 11 3.9k 10mA R 12 ...

Page 20

... AD9851 23a. FSPCBTop Layer 23b. FSPCB Power Plane Figure 23. FSPCB Evaluation Board 4-Layer PCB Layout Patterns AD9851/FSPCB Evaluation Board Parts List—GSO 0516(A) Miscellaneous Hardware 1 Amp 552742-1, 36-Pin Plastic, Right Angle, PC Mount, Female 1 Banana Jack–Color Not Important 1 Yellow Banana Jack 1 Black Banana Jack 2 BNC Coax ...

Page 21

BANANA 5V JACKS J4 GND AD9851 PGND GND 5 +V PVCC 6 W CLK WCLK FQUD 8 REFCLOCK CLKIN 9 AGND GND ...

Page 22

AD9851 25a. CGPCBTop Layer 25b. CGPCB Ground Plane Figure 25. FSPCB Evaluation Board 4-Layer PCB Layout Patterns 25c. CGPCB Power Plane 25d. CGPCB Bottom Layer –22– REV. D ...

Page 23

CGPCB Evaluation Board Parts List—GSO 0515(B) Miscellaneous Hardware 1 Amp 552742-1, 36-Pin Plastic, Right Angle, PC Mount, Female 1 Banana Jack—Color Not Important 1 Yellow Banana Jack 1 Black Banana Jack 5 BNC Coax. Connector, PC Mount 1 AD9851/CGPCB Evaluation ...

Page 24

AD9851 28 1 2.00 MAX 0.65 0.05 BSC MIN Revision History Location 1/04—Data Sheet changed from REV REV. D Renumbered figures and TPCs . . . . . . . . . . . . . . . ...

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