CP2400AB Silicon Laboratories Inc, CP2400AB Datasheet - Page 20

BOARD EVAL SPI LCD DRIVER CP2400

CP2400AB

Manufacturer Part Number
CP2400AB
Description
BOARD EVAL SPI LCD DRIVER CP2400
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2400AB

Main Purpose
LCD Development
Embedded
No
Utilized Ic / Part
CP2400
Primary Attributes
I²C, SMBus Interfaces
Secondary Attributes
Up to 128 segments
Product
Microcontroller Accessories
Core Processor
CP2400
Clock Speed
20 MHz
Interface Type
SPI
Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Cpu Core
CP2400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1857
CP2400/1-DK
7.9. Analog I/O (H1)
Several of the C8051F930 target device’s port pins are connected to the H1 terminal block. Refer to Table 5 for the
H1 terminal block connections.
7.10. IREF Connector (J7)
The C8051F930 Target Board also features a current-to-voltage 1 k load resistor that may be connected to the
current reference (IREF0) output that can be enabled on port pin (P0.7). Install a shorting block on J7 to connect
port pin P0.7 of the target device to the load resistor. If enabled by software, the IREF0 signal is then routed to the
J2[8] and H1[2] connectors.
7.11. VREF and AGND Connector (J13, J14)
The C8051F930 Target Board also features 4.7 µF capacitor in parallel with a 0.1 µF that can be connected to
P0.0/VREF when using the Precision Voltage Reference. The capacitors are connected to P0.0/VREF when a
shorting block is installed on J13. Using the Precision Voltage Reference is optional since 'F93x-'F92x devices
have an on-chip High-Speed Voltage Reference.
The shorting block J14 allows P0.1/AGND to be connected to ground. This provides a noise-free ground reference
to the analog-to-digital Converter. The use of this dedicated analog ground is optional.
7.12. C2 Pin Sharing
On the C8051F930, the debug pins C2CK and C2D are shared with the pins RST and P2.7, respectively. The
target board includes the resistors necessary to enable pin sharing which allow the RST and P2.7 pins to be used
normally while simultaneously debugging the device. See Application Note “AN124: Pin Sharing Techniques for the
C2 Interface” at
20
www.silabs.com
Table 4. Serial Interface Header (J12) Description
Table 5. H1 Terminal Block Pin Descriptions
for more information regarding pin sharing.
Header Pins UART0 Pin Description
Pin #
J12[9–10]
J12[7–8]
J12[5–6]
J12[3–4]
J12[1–2]
1
2
3
4
P0.0/V
CP2103_VIO (VDD/DC+)
REF
Rev. 0.1
P0.6/CNVSTR
GND (Ground)
Description
P0.7/IREF0
TX_MCU (P0.5)
RX_MCU (P0.4)
(Voltage Reference)
RTS (P0.6)
CTS (P0.7)

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