SI3452MS8-KIT Silicon Laboratories Inc, SI3452MS8-KIT Datasheet
SI3452MS8-KIT
Specifications of SI3452MS8-KIT
Related parts for SI3452MS8-KIT
SI3452MS8-KIT Summary of contents
Page 1
UAD IGH O L TAG FOR O AND O Features Each Si3452 high-voltage port controller supports four PSE power interfaces Programmable current limits for PoE (15.4 W), PoE+ (30 W), ...
Page 2
Si3452 Description When connected directly to the host system or configured in Auto mode, each Si3452 high-voltage port controller provides all of the critical circuitry and sophisticated power measurement functionality for the high-voltage interfaces of four complete PSE ports. The ...
Page 3
T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
Si3452 1. Electrical Specifications Unless noted otherwise, specifications apply over the operating temperature range with VDD = +3.3 V and VEE = –48 V relative to GND. VDD pins should be electrically shorted. AGND pins, DGND, GND12, and GND34 should ...
Page 5
Table 2. Recommended Operating Conditions Description Symbol Ambient Operating T A Temperature θ Thermal Impedance* JA Power Supply Voltages V Supply Voltage Supply Voltage Power Supply Currents V Supply Current ...
Page 6
Si3452 Table 4. Detection Specifications Description Detection Current Limit Detection Voltage, when kΩ DET Detection Slew Rate Detection Probe Duration Detection Probe Cycle Time Minimum Valid Signature Resistance Maximum Valid Signature Resistance Resistance at which Open Circuit ...
Page 7
Table 6. VOUT Drive and Power-on Specifications Description Symbol Max Output Resistance R ON (Port On) Current Limit I LIM I Change in Current Limit LIM Current Limit I LIM I Change in Current Limit LIM Current Limit I LIM ...
Page 8
Si3452 Table 8. Port Measurement and Monitoring Specifications Description Symbol Port Current Measurement I OFFSET Offset Port Current Measurement % Tolerance 2 Table 9. SMBus (I C) Electrical Specifications VDD = 3.0 to 3.6 V Description Symbol V Input Low ...
Page 9
Table 11. SMBus (I C) Timing Specifications (see Figure 1) VDD = 3.0 to 3.6 V Description Symbol Serial Bus Clock f SCL Frequency t SCL High Time SKH t SCL Low Time SKL t SCL, SDA Rise Time ...
Page 10
Si3452 Table 12. Interrupt (INT) Specifications Description Symbol Output Low Voltage V OL Table 13. Input Voltage Reference Specifications Description Symbol Nominal VREF Input Reference Tolerance VREF Loading 10 Test Conditions Min INT pin driving ≤ 8.5 mA — Test ...
Page 11
PSE System-Level Diagrams Host I2C Controller Figure 2. 4-Port System with Direct Host Connection 3. PSE Application Diagrams Host / Switch Si8405 Bidirectional Isolator AD0 AD1 AD2 AD3 1.1 V (e.g. TLV431) 44 Figure 3. 4-Port Application ...
Page 12
Si3452 4. Functional Description Integrating four independent, high-voltage PSE port interfaces, the Si3452 high-voltage port controller enables an extremely flexible solution for virtually any PoE or PoE+ PSE application. The Si3452 provides all of the high- voltage Power over Ethernet ...
Page 13
Classification Following a successful PD detection, the classification phase will be automatically initiated in all operational modes. During this phase, a single measurement will be made determine how much power the PD device will draw ...
Page 14
Si3452 4.4. Disconnect Detection The dV/dt disconnect function can be used to detect a disconnected device without using dc disconnect or ac disconnect. In dV/dt disconnect mode, the FET current limit is switched to 7.5 mA. If the voltage across ...
Page 15
SMBus/I C Interface Description 2 The I C interface is a two-wire, bidirectional serial bus. The I Specification (SMBus), version 1.1 and compatible with the I system controller are byte-oriented with the I method of extending the clock-low ...
Page 16
Si3452 4.8.1. Address Pins Pins with the same name must be externally connected and then tied high or low via a weak (10 k) pull up or pull down to establish the device address at power up. The Si3452 powers ...
Page 17
Register Interface The register types are described in the following sections. Refer to Table 19 on page 20 for a complete map of the registers. 5.1. Interrupt (Registers 0x00–0x01) An interrupt (INT pin low) is generated if any bit ...
Page 18
Si3452 5.4. Port Configuration (Registers 0x0A–0x11) These registers indicate the port configuration and are read/write registers. The port priority bit is set if the port is not high priority. Low-priority ports are shut down when the shutdown low- priority ports ...
Page 19
Command and Return Registers (Registers 0x12–0x1C) The global command register enables manual port turn-on or turn-off, chip reset, port reset, and measurement of port current and V . Register 0x12 is a Write only register. See Table 24 on ...
Page 20
Si3452 20 Rev. 1.2 ...
Page 21
Rev. 1.2 Si3452 21 ...
Page 22
Si3452 22 Rev. 1.2 ...
Page 23
Table 20. Si3452 Detect Encoding Value Condition 000b Unknown 001b Short 010b Reserved 011b Rlow 100b Good 101b Rhigh 110b Ropen 111b Reserved Table 21. Si3452 Class Encoding Value Condition 000b Unknown 001b Class 1 010b Class 2 011b Class ...
Page 24
Si3452 PoE+ bit Class don’t care don’t care don’t care 0 *Note: During initial port turn-on (T START Command CMD Register Power on port 0x04 ...
Page 25
Operational Notes 6.1. Port Turn On If the port is turned on by putting it in auto mode, the Si3452 will take care of all specified timing, and it will take care of the two-event classification if the first ...
Page 26
Si3452 7. PCB Layout Guidelines Following are some PCB layout considerations. See also "12.1. Evaluation Kits and Reference Designs" on page 33 for reference design information. Please visit the Silicon Labs technical support web page at www.silabs.com/support/pages/contacttechnicalsupport.aspx particularly if you ...
Page 27
Firmware Release Notes Devices marked with firmware revision 01 (see "13. Device Marking Diagram" on page 34) have the firmware revision registers set as 0x61 = 0x00; 0x62 = 0x02, and 0x63 = 0x4F (0.2.79). The following are known ...
Page 28
Si3452 9. Pin Descriptions VEE1 VEE VREF AIN AOUT AGND RBIAS AGND NC VEE4 Pin # Name Type 1 VEE1 Supply 2 VEE Supply 3 VREF Analog input 4 AIN Analog input 5 AOUT Analog output 6 AGND Ground 7 ...
Page 29
Table 25. Si3452 Pin Descriptions (Continued) Pin # Name Type 13 DET4 Analog I/O 14 SDA Digital I/O 15 GND34 Ground 16 SCL Digital I connect 18 DET3 Analog I/O 19 VDD Supply 20 VOUT3 Analog I/O ...
Page 30
Si3452 Table 25. Si3452 Pin Descriptions (Continued) Pin # Name Type 37 DET1 Analog I/O 38 RST Digital input 39 VOUT1 Analog I/O 40 INT Digital output ePAD Vee Supply 30 Description Connection for port 1 detection and classification. See ...
Page 31
Package Outline: 40-Pin QFN The Si3452 is packaged in an industry-standard, RoHS compliant Figure 7. 40-Pin QFN Mechanical Diagram Table 26. Package Diagram Dimensions Dimension aaa ...
Page 32
Si3452 11. Recommended PCB Footprint Table 27. PCB Land Pattern Dimensions Dimension Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing ...
Page 33
... All devices are packaged in RoHS-compliant, 40-pin, 6x6 mm QFN. 7. The Si3452-B01-GM is PoE+ capable. The part defaults to PoE mode at powerup but can be reconfigured to PoE+ via register settings. 12.1. Evaluation Kits and Reference Designs Part Number Populated Device Si3452MS8-KIT Si3452-B01-GM Si3452V1-RD* Si3452-B01-GM Si3452V2-RD* Si3452-B01-GM Si3452M1-RD* ...
Page 34
Si3452 13. Device Marking Diagram Line # Text Value Base part number. This is not the “Ordering Part Number” since it does not contain a 1 Si3452 specific revision. Refer to "12. Ordering Guide" on page 33 for complete ordering ...
Page 35
OCUMENT HANGE IST Revision 1.0 to Revision 1.1 Updated -GM parts temperature range to –40 to +85 °C, eliminating the need for the -IM ordering part numbers. Contact Silicon Labs for date code information if needed. ...
Page 36
... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...