ISL6527AEVAL2 Intersil, ISL6527AEVAL2 Datasheet - Page 5

• Manufacturer Part Number: ISL6527AEVAL2
• Description: EVALUATION BOARD QFN ISL6527A
• Manufacturer: Intersil

Specifications of ISL6527AEVAL2

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 0.75 ~ 3V
• Current - Output: 5A
• Voltage - Input: 3.3 ~ 5V
• Regulator Topology: Buck
• Frequency - Switching: 600kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6527A
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

Functional Pin Description
VCC
This pin provides the bias supply for the ISL6527, ISL6527A.
Connect a well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are two of the three available external pins of
the error amplifier. The FB pin is the inverting input of the
internal error amplifier and the COMP pin is the error
amplifier output. These pins are used to compensate the
voltage-control feedback loop of the converter.
REF_IN
This pin is the third available external pin of the error
amplifier and represents the non-inverting input to the error
amplifier. Connect the desired reference voltage to this pin.
Voltage applied to this pin must not exceed 1.5V.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
OCSET/SD
CPVOUT
OCSET/SD
CPVOUT
CT1
CT2
LGATE
GND
CT1
CT2
FB
1
2
3
4
16 LD 5X5 (QFN)
1
2
3
4
5
6
7
16
14 LD (SOIC)
5
TOP VIEW
TOP VIEW
15
6
5
14
7
13
8
14
13
12
10
11
9
8
12
11
10
UGATE
BOOT
PHASE
VCC
CPGND
REF_IN
COMP
9
PHASE
VCC
CPGND
NC
ISL6527, ISL6527A
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
upper MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
lower MOSFET has turned off.
OCSET/SD
Connect a resistor (R
upper MOSFET (V
source (I
(r
according to Equation 1:
An overcurrent trip cycles the soft-start function.
Pulling OCSET/SD to a voltage level below 0.8V disables
the controller. Disabling the ISL6527, ISL6527A causes the
oscillator to stop, the LGATE and UGATE outputs to be held
low, and the soft-start circuitry to re-arm.
CT1 and CT2
These pins are the connections for the external charge
pump capacitor. A minimum of a 0.1µF ceramic capacitor is
recommended for proper operation of the IC.
CPVOUT
This pin represents the output of the charge pump. The
voltage at this pin is the bias voltage for the IC. Connect a
decoupling capacitor from this pin to ground. The value of
the decoupling capacitor should be at least 10x the value of
the charge pump capacitor. This pin may be tied to the
bootstrap circuit as the source for creating the BOOT
voltage.
CPGND
This pin represents the signal and power ground for the
charge pump. Tie this pin to the ground island/plane through
the lowest impedance connection available.
I
PEAK
DS(ON)
=
OCSET
) set the converter overcurrent (OC) trip point
I
-------------------------------------------------
OCSET
r
DS ON
), and the upper MOSFET ON-resistance
xR
(
IN
OCSET
). R
)
OCSET
OCSET
) from this pin to the drain of the
, an internal 20µA current
November 18, 2008
FN9056.10
(EQ. 1)