ISL6530EVAL2

Manufacturer Part NumberISL6530EVAL2
DescriptionEVALUATION BOARD 2 ISL6530
ManufacturerIntersil
ISL6530EVAL2 datasheet
 


Specifications of ISL6530EVAL2

Main PurposeSpecial Purpose DC/DC, DDR Memory SupplyOutputs And Type2, Non-Isolated
Power - Output31.25WVoltage - Output2.5V, 1.25V
Current - Output10A, 5AVoltage - Input4.5 ~ 5.5V
Regulator TopologyBuckFrequency - Switching300kHz
Board TypeFully PopulatedUtilized Ic / PartISL6530
Lead Free Status / RoHS StatusContains lead / RoHS non-compliant  
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.
DRIVER
OSC
PWM
COMPARATOR
-
DRIVER
DV
+
OSC
Z
FB
V
E/A
Z
-
IN
+
REFERENCE
ERROR
AMP
DETAILED COMPENSATION COMPONENTS
Z
C
1
C
R
2
2
COMP
FB
-
+
ISL6530
REFERENCE
FIGURE 8. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
Compensation Break Frequency Equations
1
F
=
--------------------------------- -
F
=
×
×
Z1
P1
R
C
2
2
1
F
=
------------------------------------------------------ -
F
=
Z2
(
) x C
P2
2π x R
+
R
1
3
3
Figure 9 shows an asymptotic plot of the DC-DC converter’s
gain vs frequency. The actual modulator gain has a high gain
peak due to the high Q factor of the output filter and is not
shown in Figure 9. Using the above guidelines should give a
compensation gain similar to the curve plotted. The open loop
error amplifier gain bounds the compensation gain. Check the
compensation gain at F
with the capabilities of the error
P2
amplifier. The closed loop gain is constructed on the graph of
Figure 9 by adding the modulator gain (in dB) to the
compensation gain (in dB). This is equivalent to multiplying
the modulator transfer function to the compensation transfer
function and plotting the gain.
The compensation gain uses external impedance networks
Z
and Z
to provide a stable, high bandwidth (BW) overall
FB
IN
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
12
ISL6530
V
IN
100
L
O
V
OUT
80
PHASE
C
O
60
ESR
40
(PARASITIC)
20
0
-20
-40
-60
FB
V
OUT
Z
IN
C
R
3
3
FIGURE 9. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
R
1
Component Selection Guidelines
Output Capacitor Selection
An output capacitor is required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout.
Modern digital ICs can produce high transient load slew
1
rates. High-frequency capacitors initially supply the transient
-------------------------------------------------------- -
C
x C
and slow the current load rate seen by the bulk capacitors.
1
2
--------------------- -
2π x R
x
2
C
C
The bulk filter capacitor values are generally determined by
+
1
2
the ESR (effective series resistance) and voltage rating
requirements rather than actual capacitance requirements.
1
----------------------------------- -
2π x R
x C
3
3
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR will determine the output ripple voltage
and the initial voltage drop after a high slew-rate transient. An
aluminum electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the equivalent series inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with
your capacitor supplier and measure the capacitor’s
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case size
perform better than a single large case capacitor.
F
F
F
F
Z1
Z2
P1
P2
ERROR AMP GAIN
R2
------- -
20
log
R1
MODULATOR
GAIN
F
F
LC
ESR
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
OPEN LOOP
V
IN
20
log
--------------- -
V
OSC
COMPENSATION
GAIN
LOOP GAIN
10M
FN9052.2
November 15, 2004