ISL6532AEVAL1 Intersil, ISL6532AEVAL1 Datasheet - Page 11

• Manufacturer Part Number: ISL6532AEVAL1
• Description: EVALUATION BOARD 1 ISL6532A
• Manufacturer: Intersil

Specifications of ISL6532AEVAL1

• Main Purpose: Special Purpose DC/DC, DDR Memory Supply
• Outputs And Type: 3, Non-Isolated
• Voltage - Output: 1.25V, 1.5V, 2.5V
• Voltage - Input: 5V, 12V
• Regulator Topology: Buck
• Frequency - Switching: 250kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6532A
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output: -
• Power - Output: -

internal soft-start cycle initiates a normal soft-start ramp of
the output, at time T1. The output is brought back into
regulation by time T2 as long as the overcurrent event has
cleared.
Had the cause of the overcurrent still been present after the
delay interval, the overcurrent condition would be sensed
and the regulator would be shut down again for another
delay interval of three soft-start cycles. The resulting hiccup
mode style of protection would continue to repeat indefinitely.
The overcurrent function will trip at a peak inductor current
(I
where I
typical). The OC trip point varies mainly due to the MOSFET
r
normal operating load range, find the R
Equation 3 with:
the output inductor ripple current.
For an equation for the ripple current, see the section under
component guidelines titled “Output Inductor Selection” on
page 14.
I
DS(ON)
1. The maximum r
2. The minimum I
3. Determine I
PEAK
PEAK)
FIGURE 3. V
V
V
V
temperature.
I
DDQ
AGP
PEAK
TT
=
OCSET
determined by:
variations. To avoid overcurrent tripping in the
T0
I
---------------------------------------------------- -
OCSET
>
I
OUT MAX
INTERNAL SOFT-START FUNCTION
V
RESPONSES
r
DDQ
TT
is the internal OCSET current source (20μA
DS ON
PEAK
(
/V
x R
(
AGP
OCSET
DELAY INTERVAL
OVERCURRENT PROTECTION AND
DS(ON)
OCSET
for:
)
)
+
LDO UNDER VOLTAGE PROTECTION
(
--------- -
500mV/DIV
ΔI
2
from the specification table.
)
at the highest junction
,where ΔI is
TIME
11
OCSET
T1
resistor from
T2
(EQ. 3)
ISL6532A
A small ceramic capacitor should be placed in parallel with
R
presence of switching noise on the input voltage.
Overvoltage and Undervoltage Protection
All three regulators are protected from faults through internal
Overvoltage and Undervoltage detection circuitry. If the any
rail falls below 85% of the targeted voltage, then an
undervoltage event is tripped. An undervoltage will disable
all three regulators for a period of 3 soft-start cycles, after
which a normal soft-start is initiated. If the output is still under
85% of target, the regulators will continue to be disabled and
soft-started in a hiccup mode until the fault is cleared. This
protection feature works much the same as the VDDQ PWM
overcurrent protection works. See Figure 3.
If the any rail exceeds 115% of the targeted voltage, then all
three outputs are immediately disabled. The ISL6532A will
not re-enable the outputs until either the bias voltage is
toggled in order to initiate a POR or the S5 signal is forced
LOW and then back to HIGH.
Thermal Protection (S0/S3 State)
If the ISL6532A IC junction temperature reaches a nominal
temperature of +140°C, all regulators will be disabled. The
ISL6532A will not re-enable the outputs until the junction
temperature drops below +110°C and either the bias voltage
is toggled in order to initiate a POR or the SLP_S5 signal is
forced LOW and then back to HIGH.
Shoot-Through Protection
A shoot-through condition occurs when both the upper and
lower MOSFETs are turned on simultaneously, effectively
shorting the input voltage to ground. To protect from a shoot-
through condition, the ISL6532A incorporates specialized
circuitry, which insures that complementary MOSFETs are
not ON simultaneously.
The adaptive shoot-through protection utilized by the V
regulator looks at the lower gate drive pin, LGATE, and the
upper gate drive pin, UGATE, to determine whether a
MOSFET is ON or OFF. If the voltage from UGATE or from
LGATE to GND is less than 0.8V, then the respective
MOSFET is defined as being OFF and the other MOSFET is
allowed to turned ON. This method allows the V
regulator to both source and sink current.
Since the voltage of the MOSFET gates are being measured
to determine the state of the MOSFET, the designer is
encouraged to consider the repercussions of introducing
external components between the gate drivers and their
respective MOSFET gates before actually implementing
such measures. Doing so may interfere with the shoot-
through protection.
OCSET
to smooth the voltage across R
OCSET
DDQ
in the
May 5, 2008
FN9099.5
DDQ