ISL6537A-6506EVAL1Z Intersil, ISL6537A-6506EVAL1Z Datasheet
ISL6537A-6506EVAL1Z
Specifications of ISL6537A-6506EVAL1Z
Related parts for ISL6537A-6506EVAL1Z
ISL6537A-6506EVAL1Z Summary of contents
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... Data Sheet ACPI Regulator/Controller for Dual Channel DDR Memory Systems The ISL6537A provides a complete ACPI compliant power solution for DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply V during S0/S1 and S3 states. During S0/S1 state, DDQ ...
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... Ordering Information PART NUMBER ISL6537ACR ISL6537ACR ISL6537ACRZ (Note) ISL6537ACRZ ISL6537ACRZA (Note) ISL6537ACRZ *Add “-T” suffix to part number for tape and reel packaging. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Block Diagram 180° PHASE PWM4 SHIFT COMP4 EA4 FB4 P12V EA2 DRIVE2 FB2 P12V EA3 DRIVE3 FB3 5VSBY S3# S5# FB P12V EA1 POR EA1 ACTIVE IN S3 MONITOR AND CONTROL SOFTSTART & ENABLE A SOFTSTART & ENABLE B SOFTSTART ...
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... DAC R11 4 ISL6537A 12V 5VSBY ISL6537A SLEEP STATE LOGIC PWM CONTROLLER PWM CONTROLLER VTT REGULATOR LINEAR CONTROLLER LINEAR CONTROLLER 5VSBY 12V VIDPGD S5# S3# ISL6537A PWM4 C5 COMP4 DDR_VDDQ(x2 FB4 R8 DRIVE2 VREF_OUT FB2 VREF_IN R10 DDR_VTT(x2) DRIVE3 DDR_VTTSNS FB3 R12 5VDUAL Q1 V DDQ + Q2 ...
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... DC Gain Gain-Bandwidth Product Slew Rate CONTROL I/O (S3#, S5#) LOW Level Input Threshold HIGH Level Input Threshold 5 ISL6537A Thermal Information Thermal Resistance (Typical, Notes 1, 2) QFN Package . . . . . . . . . . . . . . . . . . . Maximum Junction Temperature (Plastic Package +150° 7.0V (DC) Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C Pb-free reflow profile ...
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... Limits should be considered typical and are not production tested Functional Pin Description 5VSBY (Pin 1) 5VSBY is the bias supply of the ISL6537A typically connected to the 5V standby rail of an ATX power supply. During S4/S5 sleep states the ISL6537A enters a reduced power mode and draws less than 1mA (I 5VSBY supply. The supply to 5VSBY should be locally bypassed using a 0.1μ ...
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... The VDDQ pins should be connected externally together to the regulated V output. During S0/S1 states, the VDDQ DDQ 7 ISL6537A pins serve as inputs to the V Reference precision divider. DDR_VTT (Pins 5, 6) The DDR_VTT pins should be connected externally together. During S0/S1 states, the DDR_VTT pins serve as ...
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... ISL6537A receives its bias voltage from the 5V Standby bus (5VSBY). Once the 5VSBY rail has exceeded the POR threshold, the ISL6537A will remain in an internal S5 state until both the SLP_S3 and SLP_S5 signal have transitioned high and the 12V POR threshold has been exceeded by the ...
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... SLP_S3# SLP_S5# 12V POR 12V 0V V DDQ_DDR 0V V GMCH 0V V TT_GMCH/CPU 0V V DAC 0V V DDQ_DDR V TT_DDR 0V VIDPGD (3 SOFTSTART CYCLES Soft-Start Rise Time Dependent Upon Capacitor On V TT_DDR V FLOATING TT_DDR (3 SOFTSTART CYCLES FIGURE 1. ISL6537A TIMING DIAGRAM Pin REF_IN ...
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... The ISL6537A will immediately shut down when the Fault Counter reaches a count of 4 when the system is restarting from an S5 state into the active, or S0, state. The ISL6537A will immediately shut down when the Fault Counter reaches a count any other time. ...
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... There are two sets of critical components in the ISL6537A OCSET switching converter. The switching components are the most critical because they switch large amounts of energy, and therefore tend to generate large amounts of noise ...
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... ISL6537A the heat to move away from the IC and also ties the pad to the ground plane through a low impedance path. The switching components should be placed close to the ISL6537A first. Minimize the length of the connections between the input capacitors placing them nearby. Position both the ceramic and bulk ...
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... If the output voltage desired is 0.8V, simply route the output voltage back to the respective FB pin through the feedback resistor and do not populate the output voltage programming resistor. The output voltage for the internal V is set internal to the ISL6537A to track the V 50%. There is no need for external programming resistors ...
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... Given a sufficiently fast control loop design, the ISL6537A will provide either 0% or 100% duty cycle in response to a load transient. The response time is the time required to slew the inductor current from an initial current value to the transient current level ...
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... These equations assume linear voltage-current transitions and do not adequately model power loss due the reverse- recovery of the upper and lower MOSFET’s body diode. The gate-charge losses are dissipated in part by the ISL6537A and do not significantly heat the MOSFETs. However, large gate-charge increases the switching interval, t ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 ISL6537A L28.6x6 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VJJC ISSUE C) ...