ISL6527EVAL1 Intersil, ISL6527EVAL1 Datasheet - Page 12

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ISL6527EVAL1

Manufacturer Part Number
ISL6527EVAL1
Description
EVALUATION BOARD SOIC ISL6527
Manufacturer
Intersil
Datasheet

Specifications of ISL6527EVAL1

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Voltage - Output
0.75 ~ 3V
Current - Output
5A
Voltage - Input
3.3 ~ 5V
Regulator Topology
Buck
Frequency - Switching
300kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6527
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
I
approximate response time interval for application and
removal of a transient load:
where: I
response time to the application of load, and t
response time to the removal of load. The worst case
response time can be either at the application or removal of
load. Be sure to check both Equations 14 and 15 at the
minimum and maximum output levels for the worst case
response time.
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic
capacitors for high frequency decoupling and bulk capacitors
to supply the current needed each time Q
small ceramic capacitors physically close to the MOSFETs
and between the drain of Q
The important parameters for the bulk input capacitor are the
voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25x greater than the maximum input
voltage and a voltage rating of 1.5x is a conservative
guideline. The RMS current rating requirement for the input
capacitor of a buck regulator is approximately 1/2 the DC load
current.
The maximum RMS current required by the regulator may be
closely approximated through Equation 16:
For a through-hole design, several electrolytic capacitors may
be needed. For surface mount designs, solid tantalum
capacitors can be used, but caution must be exercised with
regard to the capacitor surge current rating. These capacitors
must be capable of handling the surge-current at power-up.
Some capacitor series available from reputable manufacturers
are surge current tested.
MOSFET Selection/Considerations
The ISL6527, ISL6527A require two N-Channel power
MOSFETs. These should be selected based upon r
gate supply requirements, and thermal management
requirements.
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
t
t
RMS MAX
RISE
FALL
=
=
TRAN
L x I
V
=
L x I
IN
V
OUT
TRAN
- V
V
--------------- -
TRAN
is the transient load current step, t
V
OUT
IN
OUT
×
I
OUT MAX
1
and the source of Q
12
2
+
----- -
12
1
×
V
------------------------------- -
1
IN
turns on. Place the
L
×
V
f
FALL
OUT
s
2
RISE
.
DS(ON)
×
is the
ISL6527, ISL6527A
V
--------------- -
(EQ. 14)
(EQ. 15)
(EQ. 16)
V
OUT
is the
IN
,
2
factors. The power dissipation includes two loss components;
conduction loss and switching loss. The conduction losses are
the largest component of power dissipation for both the upper
and the lower MOSFETs. These losses are distributed
between the two MOSFETs according to duty factor. The
switching losses seen when sourcing current will be different
from the switching losses seen when sinking current. When
sourcing current, the upper MOSFET realizes most of the
switching losses. The lower switch realizes most of the
switching losses when the converter is sinking current
(see Equations 17 and 18). These equations assume linear
voltage-current transitions and do not adequately model
power loss due the reverse-recovery of the upper and lower
MOSFET’s body diode. The gate-charge losses are
dissipated by the ISL6527, ISL6527A and don't heat the
MOSFETs. However, large gate-charge increases the
switching interval, t
switching losses. Ensure that both MOSFETs are within their
maximum junction temperature at high ambient temperature
by calculating the temperature rise according to package
thermal-resistance specifications. A separate heatsink may be
necessary depending upon MOSFET power, package type,
ambient temperature and air flow.
where: D is the duty cycle = V
switch ON- and OFF-time, and f
Given the reduced available gate bias voltage (5V), logic-level
or sub-logic-level transistors should be used for both
N-MOSFETs. Caution should be exercised with devices
exhibiting very low V
protection present aboard the ISL6527, ISL6527A may be
circumvented by these MOSFETs if they have large parasitic
impedances and/or capacitances that would inhibit the gate of
the MOSFET from being discharged below its threshold level
before the complementary MOSFET is turned on.
Bootstrap Component Selection
External bootstrap components, a diode and capacitor, are
required to provide sufficient gate enhancement to the upper
MOSFET. The internal MOSFET gate driver is supplied by the
external bootstrap circuitry as shown in Figure 7. The boot
capacitor, C
referenced to the PHASE pin. This supply is refreshed each
cycle, when D
boot diode drop, V
Losses while Sourcing current
Losses while Sinking current
P
P
P
P
LOWER
UPPER
UPPER
LOWER
= Io
= Io
=
BOOT
=
Io
BOOT
2
Io
2
2
x r
x r
2
×
, develops a floating supply voltage
×
DS(ON)
DS(ON)
D
r
SW
r
DS ON
, plus the voltage rise across Q
conducts, to a voltage of CPVOUT less the
GS(ON)
DS ON
(
(
which increases the MOSFET
x (1 - D)
x D
)
)
×
×
characteristics. The shoot-through
D
OUT
(
1 D
+
1
-- - Io
2
S
/V
is the switching frequency.
)
IN
+
×
, t
1
-- - Io
2
V
SW
IN
×
×
is the combined
t
V
SW
IN
November 18, 2008
×
×
LOWER
t
f
SW
s
(EQ. 17)
FN9056.10
(EQ. 18)
×
f
s
.

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