ISL6524EVAL1

Manufacturer Part NumberISL6524EVAL1
DescriptionEVALUATION BOARD VRM8.5 ISL6524
ManufacturerIntersil
ISL6524EVAL1 datasheet
 


Specifications of ISL6524EVAL1

Main PurposeSpecial Purpose DC/DC, VRM SupplyOutputs And Type4, Non-Isolated
Voltage - Output1.05 ~ 1.825V, 1.2V, 1.5V, 1.8VCurrent - Output14A, 1A, 1A, 1A
Voltage - Input3.3V, 5V, 12VRegulator TopologyBuck
Frequency - Switching200kHzBoard TypeFully Populated
Utilized Ic / PartISL6524Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
Power - Output-  
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Data Sheet
VRM8.5 PWM and Triple Linear Power
System Controller
The ISL6524 provides the power control and protection for
four output voltages in high-performance microprocessor
and computer applications. The IC integrates one PWM
controller and three linear controllers, as well as the
monitoring and protection functions into a 28-pin SOIC
package. The PWM controller regulates the microprocessor
core voltage with a synchronous-rectified buck converter.
One linear controller supplies the computer system’s AGTL+
1.2V bus power. The other two linear controllers regulate
power for the 1.5V AGP bus and the 1.8V power for the chip
set core voltage and/or cache memory circuits.
The ISL6524 includes an Intel VRM8.5 compatible, TTL
5-input digital-to-analog converter (DAC) that adjusts the
microprocessor core-targeted PWM output voltage from
1.050V to 1.825V in 25mV steps. The precision reference and
voltage-mode control provide ±1% static regulation. The linear
regulators use external N-channel MOSFETs or bipolar NPN
pass transistors to provide fixed output voltages of 1.2V ±3%
(V
), 1.5V ±3% (V
) and 1.8V ±3% (V
OUT2
OUT3
The ISL6524 monitors all the output voltages. A delayed-
rising VTT (V
output) Power Good signal is issued
OUT2
before the core PWM starts to ramp up. Another system
Power Good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under-
voltage levels. Additional built-in overvoltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controllers’ overcurrent function monitors the output current
by using the voltage drop across the upper MOSFET’s
r
, eliminating the need for a current sensing resistor.
DS(ON)
Ordering Information
TEMP.
PART NUMBER
RANGE (°C)
PACKAGE
ISL6524CB*
0 to 70
28 Ld SOIC
ISL6524CBZ*
0 to 70
28 Ld SOIC
(See Note)
(Pb-free)
ISL6524CBZA*
0 to 70
28 Ld SOIC
(See Note)
(Pb-free)
ISL6524EVAL1
Evaluation Board
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
April 18, 2005
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, AGTL+ Bus, AGP Bus Power,
and North/South Bridge Core
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
and Bipolar Series Pass Transistors
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- Core PWM Output: ±1% Over Temperature
- All Other Outputs: ±3% Over Temperature
• VRM8.5 TTL-Compatible 5-Bit DAC Microprocessor Core
Output Voltage Selection
- Wide Range - 1.050V to 1.825V
).
OUT4
• Power-Good Output Voltage Monitors
- Separate delayed VTT Power Good
• Overcurrent Fault Monitor
- Switching Regulator Doesn’t Require Extra Current
Sensing Element, Uses MOSFET’s r
• Small Converter Size
- Constant Frequency Operation
- 200kHz Internal Oscillator
• Pb-Free Available (RoHS Compliant)
Applications
• Motherboard Power Regulation for Computers
Pinout
PKG.
DRIVE2
DWG. #
M28.3
M28.3
M28.3
VID25
PGOOD
VTTPG
FAULT/RT
VSEN2
VSEN4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
1-888-INTERSIL or 1-888-352-6832
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001-2002, 2004-2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6524
FN9015.3
DS(ON)
ISL6524 (SOIC) TOP VIEW
1
28
VCC
FIX
2
27
UGATE
VID3
3
26
PHASE
VID2
4
25
LGATE
VID1
5
24
PGND
23
OCSET
VID0
6
22
VSEN1
7
8
21
FB
9
20
COMP
10
19
VSEN3
11
18
DRIVE3
SS24
12
17
GND
SS13
13
16
VAUX
14
15
DRIVE4

ISL6524EVAL1 Summary of contents

  • Page 1

    ... ISL6524CBZA SOIC (See Note) (Pb-free) ISL6524EVAL1 Evaluation Board *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

  • Page 2

    Block Diagram VSEN3 1.5V or 1.26V VAUX EA3 - DRIVE3 + x0.75 x0.75 + DRIVE4 - EA4 + 1.8V or 1.26V VSEN4 - FIX INHIBIT DRIVE2 VSEN2 - + EA2 UV2 - + x0.90 + SET 1. CLK ...

  • Page 3

    IN V OUT2 +3. OUT3 +12V IN + OUT2 1.2V C OUT2 VTT POWERGOOD +3. OUT3 1.5V C OUT3 Q5 V OUT4 1.8V C OUT4 3 ...

  • Page 4

    Absolute Maximum Ratings Supply Voltage .+15V CC ...

  • Page 5

    Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued) PARAMETER Gain-Bandwidth Product Slew Rate PWM CONTROLLERS GATE DRIVERS UGATE Source UGATE Sink LGATE Source LGATE Sink PROTECTION FAULT Sourcing Current OCSET Current Source ...

  • Page 6

    Functional Pin Descriptions VCC (Pin 28) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored ...

  • Page 7

    VOUT4 can only be set from 1.7V up) by way of an external resistor divider connected at the corresponding VSEN pin. The new output voltage set by the external resistor divider can be determined using the following formula:  R ...

  • Page 8

    ATX 12V 10V VTTPG SS13 ATX 5V SS24 PGOOD 0V 3.0V ATX 3.3V V (1.8V) OUT4 V (1.5V) OUT3 TIME FIGURE 6. SOFT-START INTERVAL The time interval is dependent upon ...

  • Page 9

    Soft-start capacitor C quickly discharged. The counter increments to 2. The soft- start cycle repeats at T3 and trips the overcurrent comparator. The SS24 pin voltage increases to above 4. and the counter increments to ...

  • Page 10

    TABLE 1. OUT1 OUTPUT VOLTAGE PROGRAM PIN NAME VID3 VID2 VID1 VID0 ...

  • Page 11

    Dedicate another solid layer as a power plane and break this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom ...

  • Page 12

    Compensation Break Frequency Equations 1 ----------------------------------- × × P1 2π ------------------------------------------------------ - × × P2 2π Figure 12 shows an ...

  • Page 13

    During this interval the difference between the inductor current and the transient current level must be supplied by the output capacitor(s). Minimizing the response time can minimize the output capacitance required. The response ...

  • Page 14

    OR LESS +12V VCC ISL6524 Q1 UGATE PHASE LGATE PGND GND FIGURE 13. UPPER GATE DRIVE - DIRECT V Rectifier CR1 is a clamp that catches the negative inductor swing during the dead time between the ...

  • Page 15

    ... FIGURE 14. TYPICAL APPLICATION CIRCUIT memory controller hub voltage (V and +12VDC. For detailed information on the circuit, including a Bill-of-Materials and circuit board description, see Application Note AN9925. Also see Intersil web page (www.intersil.com), for the latest information. ), the GTL OUT1 ), and the ...

  • Page 16

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...