ISL6524EVAL1 Intersil, ISL6524EVAL1 Datasheet - Page 9

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ISL6524EVAL1

Manufacturer Part Number
ISL6524EVAL1
Description
EVALUATION BOARD VRM8.5 ISL6524
Manufacturer
Intersil
Datasheet

Specifications of ISL6524EVAL1

Main Purpose
Special Purpose DC/DC, VRM Supply
Outputs And Type
4, Non-Isolated
Voltage - Output
1.05 ~ 1.825V, 1.2V, 1.5V, 1.8V
Current - Output
14A, 1A, 1A, 1A
Voltage - Input
3.3V, 5V, 12V
Regulator Topology
Buck
Frequency - Switching
200kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6524
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
4.0V before discharging. Soft-start capacitor C
quickly discharged. The counter increments to 2. The soft-
start cycle repeats at T3 and trips the overcurrent comparator.
The SS24 pin voltage increases to above 4.0V at T4 and the
counter increments to 3. This sets the fault latch to disable the
converter.
The three linear controllers monitor their respective VSEN
pins for undervoltage. Should excessive currents cause
VSEN3 or VSEN4 to fall below the linear undervoltage
threshold, the respective UV signals set the OC latch or the
FAULT latch, providing respective C
charged. Blanking the UV signals during the C
interval allows the linear outputs to build above the
undervoltage threshold during normal operation. Cycling the
bias input power off then on resets the counter and the fault
latch.
An external resistor (R
level for the PWM converter. As shown in Figure 9, the internal
200mA current sink (I
R
enables the overcurrent comparator (OC). When the voltage
across the upper MOSFET (V
overcurrent comparator trips to set the overcurrent latch. Both
V
across R
to MOSFET switching. The overcurrent function will trip at a
peak inductor current (I
I
PEAK
SET
OCSET
10V
0A
4V
2V
and V
0V
0V
=
OCSET
I
--------------------------------------------------- -
(V
OCSET
COUNT
FIGURE 8. OVERCURRENT OPERATION
SET
DS
= 1
r
DS ON
are referenced to V
) that is referenced to V
helps V
×
T0
(
R
T1
OCSET
OCSET
)
OCSET
PEAK)
OCSET
OVERLOAD
REPORTED
COUNT
APPLIED
FAULT
T2
= 2
) develops a voltage across
) programs the overcurrent trip
DS(ON)
determined by:
9
TIME
track the variations of V
IN
) exceeds V
SS
and a small capacitor
T3
IN
COUNT
capacitors are fully
. The DRIVE signal
T4
= 3
SS
SS13
SET
charge
is, again,
, the
IN
due
The OC trip point varies with MOSFET’s r
temperature variations. To avoid overcurrent tripping in the
normal operating load range, determine the ROCSET
resistor value from the equation above with:
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
OUT1 Voltage Program
The output voltage of the PWM converter is programmed to
discrete levels between 1.050V and 1.825V. This output
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, since they are internally
pulled to the VAUX pin through 5kW resistors. Changing the
VID inputs during operation is not recommended and could
toggle the PGOOD signal and exercise the overvoltage
protection. The output voltage program is Intel VRM8.5
compatible.
1. The maximum r
2. The minimum I
3. Determine I
i
D
where DI is the output inductor ripple current.
×
OVERCURRENT TRIP:
PWM
r
DS ON
OC
(
V
FIGURE 9. OVERCURRENT DETECTION
+
DS
-
)
>
>
PEAK
V
CONTROL
I
OCSET
SET
GATE
DS(ON)
OCSET
for I
I
OCSET
DRIVE
200µA
×
OCSET
R
PEAK
at the highest junction temperature
from the specification table
OCSET
VCC
> I
OUT(MAX)
UGATE
PHASE
R
V PHASE
V OCSET
V
OCSET
SET
DS(ON)
+
+ (DI) / 2,
=
=
V
V IN V DS
IN
V IN V SET
i
D
V
+
= +5V
DS
April 18, 2005
FN9015.3

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