ISL6559EVAL2 Intersil, ISL6559EVAL2 Datasheet - Page 13

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ISL6559EVAL2

Manufacturer Part Number
ISL6559EVAL2
Description
EVALUATION BOARD 2 ISL6559
Manufacturer
Intersil
Datasheets

Specifications of ISL6559EVAL2

Main Purpose
Special Purpose DC/DC, VRM Supply
Outputs And Type
1, Non-Isolated
Power - Output
67.6W
Voltage - Output
1.3V
Current - Output
52A
Voltage - Input
5V, 12V
Regulator Topology
Buck
Frequency - Switching
250kHz
Board Type
Fully Populated
Utilized Ic / Part
HIP6601, ISL6559
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Over-Voltage Protection
When the output of the differential amplifier (VDIFF) reaches
2.2V, PGOOD immediately goes low indicating a fault. Two
protective actions are taken by the ISL6559 to protect the
microprocessor load.
First, all PWM outputs are commanded low. Directing the
Intersil drivers to turn on the lower MOSFETs; shunting the
output to ground preventing any further increase in output
voltage. The PWM outputs remain low until VDIFF falls to the
programmed DAC level at which time they go into a high-
impedance state. The Intersil drivers respond by turning off
both upper and lower MOSFETs. If the over-voltage
condition reoccurs, the ISL6559 will again command the
lower MOSFETs to turn on. The ISL6559 will continue to
protect the load in this fashion as long as the over-voltage
repeats.
Second, the OVP pin pulls to VCC and can deliver 100mA
into the gate of either a MOSFET or SCR placed across the
input voltage (V
SCR collapses the power rail and causes a fuse placed
further up stream to blow. The fuse must be sized such that
the MOSFET or SCR will not overheat before the fuse blows.
Once an over-voltage condition is detected, normal PWM
operation ceases and PGOOD remains low until the
ISL6559 is reset. Cycling the voltage on EN below 1.23V or
the bias to VCC below the POR-falling threshold will reset
the controller.
Over-Current Protection
The ISL6559 takes advantage of the proportionality between
the load current and the average current, I
over-current condition. See the Channel-Current Balance
section for more detail on how the average current is
created. The average current is continually compared with a
constant 90µA reference current. Once the average current
exceeds the reference current, the comparator triggers the
converter to shutdown. The POR circuit places all PWM
signals in a high-impedance state which commands the
drivers to turn off both upper and lower MOSFETs. PGOOD
pulls low and the system remains in this state while the
IN
) and V
OUT
13
. Turning on the MOSFET or
AVG
, to detect an
ISL6559
controller counts 2048 phase clock cycles. This is followed
by a soft-start attempt (see Soft-Start).
During the soft-start interval, the over-current protection
circuitry remains active. As the output voltage ramps up, if an
over-current condition is detected, the ISL6559 immediately
places all PWM signals in a high-impedance state. The
ISL6559 repeats the 2048-cycle wait period and follows with
another soft-start attempt, as shown in
Figure 11. This hiccup mode of operation repeats up to
seven times. On the eighth soft-start attempt, the part
latches off. Once latched off, the ISL6559 can only be reset
when the voltage on EN is brought below 1.23V or VCC is
brought below the POR falling threshold. Upon completion of
a successful soft-start attempt, operation will continue as
normal, PGOOD will return high, and the OC latch counter is
reset.
During VID-on-the-fly transitions, the OC comparator output
is blanked. The quality and mix of output capacitors used in
different applications leads to a wide output capacitance
range. Depending upon the magnitude and direction of the
VID change, the change in voltage across the output
capacitors could result in significant current flow. Summing
this instantaneous current with the load current already
present could drive the average current above the reference
current level and cause an OC trip during the transition. By
blanking the OC comparator during the VID-on-the-fly
transition, nuisance tripping is avoided.
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multi-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications.
FIGURE 11. OVERCURRENT BEHAVIOR IN HICCUP MODE
0A
0V
5ms/DIV
OUTPUT CURRENT, 20A/DIV
OUTPUT VOLTAGE,
500mV/DIV
December 29, 2004
FN9084.8

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