C8051F120DK Silicon Laboratories Inc, C8051F120DK Datasheet - Page 346

DEVKIT-F120/21/22/23/24/25/26/27

C8051F120DK

Manufacturer Part Number
C8051F120DK
Description
DEVKIT-F120/21/22/23/24/25/26/27
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F120DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F120
Silicon Family Name
C8051F12x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F120, 121, 122, 123, 124, 125, 126, 127
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1224

Available stocks

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Part Number:
C8051F120DK
Manufacturer:
SiliconL
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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
346
This register is used to read or write data to the Flash memory across the JTAG interface.
Bits9–2: DATA7–0: Flash Data Byte.
Bit1:
Bit0:
This register holds the address for all JTAG Flash read, write, and erase operations. This register
autoincrements after each read or write, regardless of whether the operation succeeded or failed.
Bits15–0: Flash Operation 17-bit Address.
Bit16
Bit9
JTAG Register Definition 25.5. FLASHADR: JTAG Flash Address
FAIL: Flash Fail Bit.
0: Previous Flash memory operation was successful.
1: Previous Flash memory operation failed. Usually indicates the associated memory loca-
tion was locked.
BUSY: Flash Busy Bit.
0: Flash interface logic is not busy.
1: Flash interface logic is processing a request. Reads or writes while BUSY = 1 will not ini-
tiate another operation.
JTAG Register Definition 25.4. FLASHDAT: JTAG Flash Data
Rev. 1.4
Bit0
Bit0
0000000000
Reset Value
Reset Value
0x00000

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