C8051F330DK Silicon Laboratories Inc, C8051F330DK Datasheet - Page 111

• Manufacturer Part Number: C8051F330DK
• Description: DEV KIT FOR C8051F330/F331
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F330DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F33x
• Interface Type: RS-232
• Operating Supply Voltage: 7 V to 15 V
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F330
• Silicon Family Name: C8051F33x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F330, C8051F331
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1264

13.2. Programmable Internal Low-Frequency (L-F) Oscillator
All C8051F330/1/2/3/4/5 devices include a programmable low-frequency internal oscillator, which is cali-
brated to a nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can be
changed to divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see SFR Defi-
nition 13.3). Additionally, the OSCLF bits (OSCLCN5:2) can be used to adjust the oscillator’s output fre-
quency.
13.2.1. Calibrating the Internal L-F Oscillator
Timers 2 and 3 include capture functions that can be used to capture the oscillator frequency, when run-
ning from a known time base. When either Timer 2 or Timer 3 is configured for L-F Oscillator Capture
Mode, a falling edge (Timer 2) or rising edge (Timer 3) of the low-frequency oscillator’s output will cause a
capture event on the corresponding timer. As a capture event occurs, the current timer value
(TMRnH:TMRnL) is copied into the timer reload registers (TMRnRLH:TMRnRLL). By recording the differ-
ence between two successive timer capture values, the low-frequency oscillator’s period can be calcu-
lated. The OSCLF bits can then be adjusted to produce the desired oscillator frequency.
Bit7:
Bit6:
Bits5–2: OSCLF[3:0]: Internal L-F Oscillator Frequency Control bits.
Bits1–0: OSCLD[1:0]: Internal L-F Oscillator Divider Select.
OSCLEN OSCLRDY OSCLF3
R/W
Bit7
OSCLEN: Internal L-F Oscillator Enable.
0: Internal L-F Oscillator Disabled.
1: Internal L-F Oscillator Enabled.
OSCLRDY: Internal L-F Oscillator Ready.
0: Internal L-F Oscillator frequency not stabilized.
1: Internal L-F Oscillator frequency stabilized.
Fine-tune control bits for the Internal L-F oscillator frequency. When set to 0000b, the L-F
oscillator operates at its fastest setting. When set to 1111b, the L-F oscillator operates at its
slowest setting.
00: Divide by 8 selected.
01: Divide by 4 selected.
10: Divide by 2 selected.
11: Divide by 1 selected.
SFR Definition 13.3. OSCLCN: Internal L-F Oscillator Control
Bit6
R
R/W
Bit5
OSCLF2
R/W
Bit4
OSCLF1
Rev. 1.7
R/W
Bit3
OSCLF0
R/W
Bit2
C8051F330/1/2/3/4/5
OSCLD1 OSCLD0
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
00vvvv00
0xE3
115