C8051F005DK Silicon Laboratories Inc, C8051F005DK Datasheet - Page 67

• Manufacturer Part Number: C8051F005DK
• Description: DEV KIT FOR F005/006/007
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F005DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F01x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F005
• Silicon Family Name: C8051F00x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051 F005/006/007
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1188

67
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Mnemonic
ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
LJMP addr16
SJMP rel
JMP @A+DPTR
JZ rel
JNZ rel
CJNE A,direct,rel
CJNE A,#data,rel
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ Rn,rel
DJNZ direct,rel
NOP
Notes on Registers, Operands and Addressing Modes:
Rn - Register R0-R7 of the currently selected register bank.
@Ri - Data RAM location addressed indirectly through register R0-R1
rel - 8-bit, signed (two’s compliment) offset relative to the first byte of the following instruction. Used by SJMP
and all conditional jumps.
direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00-0x7F) or an
SFR (0x80-0xFF).
#data - 8-bit constant
#data 16 - 16-bit constant
bit - Direct-addressed bit in Data RAM or SFR.
addr 11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same 2K-
byte page of program memory as the first byte of the following instruction.
addr 16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within the
64K-byte program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Description
Absolute subroutine call
Absolute jump
Jump indirect relative to DPTR
Compare immediate to A and jump if not equal
Compare immediate to register and jump if not
equal
Compare immediate to indirect and jump if not
equal
No operation
Long subroutine call
Return from subroutine
Return from interrupt
Long jump
Short jump (relative address)
Jump if A equals zero
Jump if A does not equal zero
Compare direct byte to A and jump if not equal
Decrement register and jump if not zero
Decrement direct byte and jump if not zero
Rev. 1.7
Bytes
2
3
1
1
2
3
2
1
2
2
3
3
3
3
2
3
1
Cycles
Clock
2/3
2/3
3/4
3/4
3/4
4/5
2/3
3/4
3
4
5
5
3
4
3
3
1