C8051F020DK Silicon Laboratories Inc, C8051F020DK Datasheet - Page 107

DEV KIT FOR F020/F021/F022/F023

C8051F020DK

Manufacturer Part Number
C8051F020DK
Description
DEV KIT FOR F020/F021/F022/F023
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F020DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F020
Silicon Family Name
C8051F02x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F020/021/022/023
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1200

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12.2. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are two sepa-
rate memory spaces: program memory and data memory. Program and data memory share the same address space but
are accessed via different instruction types. There are 256 bytes of internal data memory and 64k bytes of internal
program memory address space implemented within the CIP-51. The CIP-51 memory organization is shown in
Figure 12.2.
12.2.1. Program Memory
The CIP-51 has a 64k byte program memory space. The MCU implements 65536 bytes of this program memory
space as in-system re-programmed FLASH memory, organized in a contiguous block from addresses 0x0000 to
0xFFFF. Note: 512 bytes (0xEE00 to 0xFFFF) of this memory are reserved for factory use and are not available for
user program storage.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory by setting
the Program Store Write Enable bit (PSCTL.0) and using the MOVX instruction. This feature provides a mechanism
for the CIP-51 to update program code and use the program memory space for non-volatile data storage. Refer to
tion “15. FLASH MEMORY” on page 139
0x1007F
0x10000
0xFDFF
0xFFFF
0xFE00
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Scrachpad Memory
Byte Sectors)
(DATA only)
RESERVED
(In-System
(FLASH)
FLASH
Figure 12.2. Memory Map
for further details.
0xFFFF
0x0FFF
0x1000
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.4
XRAM - 4096 Bytes
(accessable using MOVX
(Indirect Addressing
(Direct and Indirect
Off-chip XRAM space
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
C8051F020/1/2/3
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
Sec-
107

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