C8051F020DK Silicon Laboratories Inc, C8051F020DK Datasheet - Page 78

DEV KIT FOR F020/F021/F022/F023

C8051F020DK

Manufacturer Part Number
C8051F020DK
Description
DEV KIT FOR F020/F021/F022/F023
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F020DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F020
Silicon Family Name
C8051F02x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F020/021/022/023
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1200

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F020DK
Manufacturer:
SiliconL
Quantity:
10
C8051F020/1/2/3
7.2.3. Settling Time Requirements
When the ADC1 input configuration is changed (i.e., a different MUX or PGA selection), a minimum settling (or
tracking) time is required before an accurate conversion can be performed. This settling time is determined by the
ADC1 MUX resistance, the ADC1 sampling capacitance, any external source resistance, and the accuracy required
for the conversion. Figure 7.3 shows the equivalent ADC1 input circuit. The required ADC1 settling time for a given
settling accuracy (SA) may be approximated by Equation 7.1. Note that in low-power tracking mode, three SAR1
clocks are used for tracking at the start of every conversion. For most applications, these three SAR1 clocks will meet
the tracking requirements. See Table 7.1 for absolute minimum settling time requirements.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required tracking time in seconds
R
n is the ADC resolution in bits (8).
78
TOTAL
is the sum of the ADC1 MUX resistance and any external source resistance.
Equation 7.1. ADC1 Settling Time Requirements
Figure 7.3. ADC1 Equivalent Input Circuit
AIN1.x
t
=
RC
ln
MUX Select
Input
= R
------ -
SA
2
n
MUX
Rev. 1.4
R
* C
MUX
R
SAMPLE
TOTAL
= 5k
C
SAMPLE
C
SAMPLE
= 10pF

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