C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 103

KIT DEV FOR C8051F41X

C8051F410DK

Manufacturer Part Number
C8051F410DK
Description
KIT DEV FOR C8051F41X
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F410DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F410
Silicon Family Name
C8051F41x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F41x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1314

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F410DK
Manufacturer:
Silicon Labs
Quantity:
135
11. Memory Organization and SFRs
The memory organization of the C8051F41x is similar to that of a standard 8051. There are two separate
memory spaces: program memory and data memory. Program and data memory share the same address
space but are accessed via different instruction types. The memory map is shown in Figure 11.1.
11.1. Program Memory
The CIP-51 core has a 64k-byte program memory space. The C8051F410/1 implement 32k of this pro-
gram memory space as in-system, re-programmable Flash memory, organized in a contiguous block from
addresses 0x0000 to 0x7DFF. Addresses above 0x7DFF are reserved on the 32 kB devices. The
C8051F412/3 implement 16 kB of Flash from addresses 0x0000 to 0x3FFF.
Program memory is normally assumed to be read-only. However, the C8051F41x can write to program
memory by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX write instruction.
This feature provides a mechanism for updates to program code and use of the program memory space for
non-volatile data storage. Refer to
0x7DFF
0x3FFF
0x7E00
0x4000
0x0000
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Programmable in 512
Byte Sectors)
Byte Sectors)
RESERVED
RESERVED
16 kB Flash
32 kB Flash
(In-System
(In-System
(Flash)
‘F412/3
‘F410/1
Section “16. Flash Memory” on page 135
Figure 11.1. Memory Map
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.1
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
General Purpose
EXTERNAL DATA ADDRESS SPACE
Upper 128 RAM
Bit Addressable
0xFFFF
0x07FF
Addressing)
0x0800
0x0000
Registers
Only)
DATA MEMORY (RAM)
XRAM - 2048 Bytes
0x0000 to 0x07FF, wrapped
Same 2048 bytes as from
(accessible using MOVX
on 2048-byte boundaries
C8051F410/1/2/3
instruction)
(Direct Addressing Only)
Special Function
for further details.
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
103

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