C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 244

• Manufacturer Part Number: C8051F410DK
• Description: KIT DEV FOR C8051F41X
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F410DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F41x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F410
• Silicon Family Name: C8051F41x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F41x
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1314

C8051F410/1/2/3
24.3. Timer 3
Timer 3 is a 16-bit timer formed by two 8-bit SFRs: TMR3L (low byte) and TMR3H (high byte). Timer 3 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T3SPLIT bit (TMR3CN.3) defines
the Timer 3 operation mode. Timer 3 can also be used in Capture Mode to measure the smaRTClock clock
frequency or the External Oscillator clock frequency.
Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. Note that the external oscillator source divided by 8 is synchronized with the system
clock.
24.3.1. 16-bit Timer with Auto-Reload
When T3SPLIT (TMR3CN.3) is zero, Timer 3 operates as a 16-bit timer with auto-reload. Timer 3 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 3
reload registers (TMR3RLH and TM3RLL) is loaded into the Timer 3 register as shown in Figure 24.7, and
the Timer 3 High Byte Overflow Flag (TMR3CN.7) is set. If Timer 3 interrupts are enabled, an interrupt will
be generated on each Timer 3 overflow. Additionally, if Timer 3 interrupts are enabled and the TF3LEN bit
is set (TMR3CN.5), an interrupt will be generated each time the lower 8 bits (TMR3L) overflow from 0xFF
to 0x00.
244
External Clock / 8
SYSCLK / 12
SYSCLK
T3XCLK
0
1
Figure 24.7. Timer 3 16-Bit Mode Block Diagram
M
H
T
3
M
T
3
L
0
1
CKCON
M
H
T
2
T
M
2
L
M
T
1
T
M
0
S
C
A
1
TR3
S
C
A
0
TCLK
Rev. 1.1
TMR3RLL TMR3RLH
TMR3L
TMR3H
Reload
T3SPLIT
T3XCLK
TF3LEN
TF3H
TF3L
TR3
Interrupt