R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 361

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
9.7
9.7.1
The CPU priority control function over DMAC can be used according to the CPU priority control
register (CPUPCR) setting. For details, see section 6.7, CPU Priority Control Function Over DTC
and DMAC.
The priority level of the DMAC is specified by bits DMAP2 to DMAP0 and can be specified for
each channel.
The priority level of the CPU is specified by bits CPUP2 to CPUP0. The value of bits CPUP2 to
CPUP0 is updated according to the exception handling priority.
If the CPU priority control is enabled by the CPUPCE bit in CPUPCR, when the CPU has priority
over the DMAC, a transfer request for the corresponding channel is masked and the transfer is not
activated. When another channel has priority over or the same as the CPU, a transfer request is
received regardless of the priority between channels and the transfer is activated.
The transfer request masked by the CPU priority control function is suspended. When the transfer
channel is given priority over the CPU by changing priority levels of the CPU or channel, the
transfer request is received and the transfer is resumed. Writing 0 to the DTE bit clears the
suspended transfer request.
When the CPUPCE bit is cleared to 0, it is regarded as the lowest priority.
Relationship among DMAC and Other Bus Masters
CPU Priority Control Function Over DMAC
Rev. 2.00 Sep. 16, 2009 Page 331 of 1036
Section 9 DMA Controller (DMAC)
REJ09B0414-0200

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