R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 583

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

This LSI has four units (unit 0 to unit 3) of an on-chip 8-bit timer module that comprise two 8-bit
counter channels, totaling eight channels. The 8-bit timer module can be used to count external
events and also be used as a multifunction timer in a variety of applications, such as generation of
counter reset, interrupt requests, and pulse output with a desired duty cycle using a compare-match
signal with two registers.
Figures 14.1 to 14.4 show block diagrams of the 8-bit timer module (unit 0 to unit 3).
This section describes unit 0 (channels 0 and 1) and unit 2 (channels 4 and 5). Unit 0 and unit 1
have the same functions. Unit 2 and unit 3 have the same functions as unit 0 and unit 1, except that
units 2 and 3 do not have the TMRI and TMCI pins.
14.1
• Selection of seven clock sources
• Selection of three ways to clear the counters
• Timer output control by a combination of two compare match signals
• Cascading of two channels
• Three interrupt sources
• Generation of trigger to start A/D converter conversion (available in unit 0 and unit 1 only)
• Generation of trigger to start ∆Σ A/D converter conversion (available in unit 0 and unit 2 only)
• Module stop state specifiable
The counters can be driven by one of six internal clock signals (Pφ/2, Pφ/8, Pφ/32, Pφ/64,
Pφ/1024, or Pφ/8192) or an external clock input (only internal clock available in units 2 and 3:
Pφ/2, Pφ/8, Pφ/32, Pφ/64, Pφ/1024, and Pφ/8192).
The counters can be cleared on compare match A or B, or by an external reset signal. (This is
available only in unit 0 and unit 1.)
The timer output signal in each channel is controlled by a combination of two independent
compare match signals, enabling the timer to output pulses with a desired duty cycle or PWM
output.
Operation as a 16-bit timer is possible, using TMR_0 for the upper 8 bits and TMR_1 for the
lower 8 bits (16-bit count mode).
TMR_1 can be used to count TMR_0 compare matches (compare match count mode).
Compare match A, compare match B, and overflow interrupts can be requested independently.
Features
Section 14 8-Bit Timers (TMR)
Rev. 2.00 Sep. 16, 2009 Page 553 of 1036
Section 14 8-Bit Timers (TMR)
REJ09B0414-0200