R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 628

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 15 Watchdog Timer (WDT)
(2)
These registers can be read from in the same way as other registers. For reading, TCSR is assigned
to address H'FFA4, TCNT to address H'FFA5, and RSTCSR to address H'FFA7.
15.6.2
If a TCNT clock pulse is generated during the T2 cycle of a TCNT write cycle, the write takes
priority and the timer counter is not incremented. Figure 15.5 shows this operation.
15.6.3
If bits CKS2 to CKS0 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. The watchdog timer must be stopped (by clearing the TME bit to 0) before the
values of bits CKS2 to CKS0 are changed.
15.6.4
If the timer mode is switched from watchdog timer mode to interval timer mode while the WDT is
operating, errors could occur in the incrementation. The watchdog timer must be stopped (by
clearing the TME bit to 0) before switching the timer mode.
Rev. 2.00 Sep. 16, 2009 Page 598 of 1036
REJ09B0414-0200
Reading from TCNT, TCSR, and RSTCSR
Pφ
Address
Internal write signal
TCNT input clock
TCNT
Conflict between Timer Counter (TCNT) Write and Increment
Changing Values of Bits CKS2 to CKS0
Switching between Watchdog Timer Mode and Interval Timer Mode
Figure 15.5 Conflict between TCNT Write and Increment
TCNT write cycle
T
1
N
T
2
Counter write data
M